linux-kernel - Re: [PATCH v8 04/16] clk: npcm8xx: add clock controller

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Date:   Fri, 29 Jul 2022 15:56:01 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Tomer Maimon <tmaimon77@...il.com>
Cc:     Arnd Bergmann <arnd@...db.de>,
        Avi Fishman <avifishman70@...il.com>,
        Benjamin Fair <benjaminfair@...gle.com>,
        Biju Das <biju.das.jz@...renesas.com>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Greg KH <gregkh@...uxfoundation.org>,
        Jonathan Neuschäfer <j.neuschaefer@....net>,
        Jiri Slaby <jirislaby@...nel.org>,
        Joel Stanley <joel@....id.au>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Guenter Roeck <linux@...ck-us.net>,
        Lubomir Rintel <lkundrak@...sk>,
        Marcel Ziswiler <marcel.ziswiler@...adex.com>,
        Michael Turquette <mturquette@...libre.com>,
        Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...hiba.co.jp>,
        Olof Johansson <olof@...om.net>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Robert Hancock <robert.hancock@...ian.com>,
        Rob Herring <robh+dt@...nel.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Tali Perry <tali.perry1@...il.com>,
        Thomas G leixner <tglx@...utronix.de>,
        Patrick Venture <venture@...gle.com>,
        Vinod Koul <vkoul@...nel.org>, Will Deacon <will@...nel.org>,
        Wim Van Sebroeck <wim@...ux-watchdog.org>,
        Nancy Yuen <yuenn@...gle.com>,
        devicetree <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        SERIAL DRIVERS <linux-serial@...r.kernel.org>,
        LINUXWATCHDOG <linux-watchdog@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v8 04/16] clk: npcm8xx: add clock controller

Quoting Tomer Maimon (2022-07-24 02:06:54)
> On Sat, 23 Jul 2022 at 06:02, Stephen Boyd <sboyd@...nel.org> wrote:
> > Furthermore, in DT, reg properties aren't supposed to overlap. When that
> > happens it usually indicates the DT is being written to describe driver
> > structure instead of the IP blocks that are delivered by the hardware
> > engineer. In this case it sounds like a combined clk and reset IP block
> > because they piled all the SoC glue stuff into a register range. Are
> > there more features in this IO range?
> 
> No, this range only combined the reset and clock together, but it
> combined in a way that we cannot split it to two or even three
> different registers...

Because it is jumbled in some range?

> 
> I do see a way to combine the clock and the reset driver, the NPCM
> reset driver is serving other NPCM BMC's.
> Should we use regmap to handle the clock registers instead of ioremap?

Sure? Using regmap or not looks like a parallel discussion. How does it
help use platform APIs?