linux-kernel - Re: [V12,1/7] dt-bindings: mediatek: Add mediatek, mt8195-jpgenc compatible

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Message-ID: <44dde534-769c-c456-c869-4e29213b3d56@collabora.com>
Date:   Fri, 29 Jul 2022 10:34:51 +0200
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Irui Wang <irui.wang@...iatek.com>,
        Hans Verkuil <hverkuil-cisco@...all.nl>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Tzung-Bi Shih <tzungbi@...omium.org>,
        nicolas.dufresne@...labora.com, wenst@...omium.org,
        kyrie wu <kyrie.wu@...iatek.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Project_Global_Chrome_Upstream_Group@...iatek.com,
        linux-media@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        Tomasz Figa <tfiga@...omium.org>, xia.jiang@...iatek.com,
        maoguang.meng@...iatek.com,
        Nícolas F. R. A. Prado 
        <nfraprado@...labora.com>
Subject: Re: [V12,1/7] dt-bindings: mediatek: Add mediatek, mt8195-jpgenc
 compatible

Il 29/07/22 08:26, Irui Wang ha scritto:
> From: kyrie wu <kyrie.wu@...iatek.com>
> 
> Add mediatek,mt8195-jpgenc compatible to binding document.
> 
> Signed-off-by: kyrie wu <kyrie.wu@...iatek.com>
> Signed-off-by: irui wang <irui.wang@...iatek.com>
> ---
>   .../media/mediatek,mt8195-jpegenc.yaml        | 139 ++++++++++++++++++
>   1 file changed, 139 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml
> new file mode 100644
> index 000000000000..d9133e6a92f8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml
> @@ -0,0 +1,139 @@

..snip..

> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/memory/mt8195-memory-port.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    #include <dt-bindings/clock/mt8195-clk.h>
> +    #include <dt-bindings/power/mt8195-power.h>
> +
> +    soc {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        jpgenc_master {

What about using ranges here? The binding would look way cleaner, like:

         jpeg-encoder@...30000 {
                .... properties ....
                ranges = <0x30000   0 0x1a030000 0x10000>, /* P.S.: Not tested! */
                         <0x1030000 0 0x1b030000 0x10000>;

                encoder-core@...00 {
                         compatible = "mediatek,mt8195-jpgenc-hw";
                         reg = <0 0x30000 0 0x10000>;
                         .... properties ....
                };

                encoder-core@...0000 {
                         compatible = "mediatek,mt8195-jpgenc-hw";
                         reg = <0 0x1030000 0 0x10000>;
                         .... properties ....
                };
         };

P.S.: Added Krzysztof to the loop.

Krzysztof, can you please give an opinion on that?

Thanks,
Angelo

> +                compatible = "mediatek,mt8195-jpgenc";
> +                power-domains = <&spm MT8195_POWER_DOMAIN_VENC_CORE1>;
> +                iommus = <&iommu_vpp M4U_PORT_L20_JPGENC_Y_RDMA>,
> +                <&iommu_vpp M4U_PORT_L20_JPGENC_C_RDMA>,
> +                <&iommu_vpp M4U_PORT_L20_JPGENC_Q_TABLE>,
> +                <&iommu_vpp M4U_PORT_L20_JPGENC_BSDMA>;
> +                #address-cells = <2>;
> +                #size-cells = <2>;
> +
> +                jpgenc@...30000 {
> +                        compatible = "mediatek,mt8195-jpgenc-hw";
> +                        reg = <0 0x1a030000 0 0x10000>;
> +                        iommus = <&iommu_vdo M4U_PORT_L19_JPGENC_Y_RDMA>,
> +                        <&iommu_vdo M4U_PORT_L19_JPGENC_C_RDMA>,
> +                        <&iommu_vdo M4U_PORT_L19_JPGENC_Q_TABLE>,
> +                        <&iommu_vdo M4U_PORT_L19_JPGENC_BSDMA>;
> +                        interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 0>;
> +                        clocks = <&vencsys CLK_VENC_JPGENC>;
> +                        clock-names = "jpgenc";
> +                        power-domains = <&spm MT8195_POWER_DOMAIN_VENC>;
> +                };
> +
> +                jpgenc@...30000 {
> +                        compatible = "mediatek,mt8195-jpgenc-hw";
> +                        reg = <0 0x1b030000 0 0x10000>;
> +                        iommus = <&iommu_vpp M4U_PORT_L20_JPGENC_Y_RDMA>,
> +                        <&iommu_vpp M4U_PORT_L20_JPGENC_C_RDMA>,
> +                        <&iommu_vpp M4U_PORT_L20_JPGENC_Q_TABLE>,
> +                        <&iommu_vpp M4U_PORT_L20_JPGENC_BSDMA>;
> +                        interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 0>;
> +                        clocks = <&vencsys_core1 CLK_VENC_CORE1_JPGENC>;
> +                        clock-names = "jpgenc";
> +                        power-domains = <&spm MT8195_POWER_DOMAIN_VENC_CORE1>;
> +                };
> +        };
> +    };