linux-kernel - [PATCH 4/8] arm64: dts: mediatek: mt6795: Replace UART dummy clocks with pericfg

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Message-Id: <20220729104441.39177-5-angelogioacchino.delregno@collabora.com>
Date:   Fri, 29 Jul 2022 12:44:36 +0200
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     robh+dt@...nel.org
Cc:     krzysztof.kozlowski+dt@...aro.org, vkoul@...nel.org,
        chaotian.jing@...iatek.com, ulf.hansson@...aro.org,
        matthias.bgg@...il.com, angelogioacchino.delregno@...labora.com,
        hsinyi@...omium.org, nfraprado@...labora.com,
        allen-kh.cheng@...iatek.com, fparent@...libre.com,
        sam.shih@...iatek.com, sean.wang@...iatek.com,
        long.cheng@...iatek.com, wenbin.mei@...iatek.com,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        dmaengine@...r.kernel.org, linux-mmc@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, phone-devel@...r.kernel.org,
        ~postmarketos/upstreaming@...ts.sr.ht
Subject: [PATCH 4/8] arm64: dts: mediatek: mt6795: Replace UART dummy clocks with pericfg

The UART nodes had a dummy clock for early bringup, as it is
expected that these are left on by the bootloader: now that
the pericfg clock controller is supported, we can replace
them with the real clocks.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
---
 arch/arm64/boot/dts/mediatek/mt6795.dtsi | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index 9166d481a366..559fec1ee123 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -312,7 +312,8 @@ uart0: serial@...02000 {
 				     "mediatek,mt6577-uart";
 			reg = <0 0x11002000 0 0x400>;
 			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&clk26m>;
+			clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
+			clock-names = "baud", "bus";
 			status = "disabled";
 		};
 
@@ -321,7 +322,8 @@ uart1: serial@...03000 {
 				     "mediatek,mt6577-uart";
 			reg = <0 0x11003000 0 0x400>;
 			interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&clk26m>;
+			clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
+			clock-names = "baud", "bus";
 			status = "disabled";
 		};
 
@@ -330,7 +332,8 @@ uart2: serial@...04000 {
 				     "mediatek,mt6577-uart";
 			reg = <0 0x11004000 0 0x400>;
 			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&clk26m>;
+			clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
+			clock-names = "baud", "bus";
 			status = "disabled";
 		};
 
@@ -339,7 +342,8 @@ uart3: serial@...05000 {
 				     "mediatek,mt6577-uart";
 			reg = <0 0x11005000 0 0x400>;
 			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&clk26m>;
+			clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
+			clock-names = "baud", "bus";
 			status = "disabled";
 		};
 	};
-- 
2.35.1