[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220729112313.86169-4-neal_liu@aspeedtech.com>
Date: Fri, 29 Jul 2022 19:23:11 +0800
From: Neal Liu <neal_liu@...eedtech.com>
To: Corentin Labbe <clabbe.montjoie@...il.com>,
Christophe JAILLET <christophe.jaillet@...adoo.fr>,
Randy Dunlap <rdunlap@...radead.org>,
Herbert Xu <herbert@...dor.apana.org.au>,
"David S . Miller" <davem@...emloft.net>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Joel Stanley <joel@....id.au>,
"Andrew Jeffery" <andrew@...id.au>,
Dhananjay Phadke <dhphadke@...rosoft.com>,
"Johnny Huang" <johnny_huang@...eedtech.com>
CC: <linux-aspeed@...ts.ozlabs.org>, <linux-crypto@...r.kernel.org>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <BMC-SW@...eedtech.com>,
Dhananjay Phadke <dphadke@...ux.microsoft.com>
Subject: [PATCH v9 3/5] ARM: dts: aspeed: Add HACE device controller node
Add hace node to device tree for AST2500/AST2600.
Signed-off-by: Neal Liu <neal_liu@...eedtech.com>
Signed-off-by: Johnny Huang <johnny_huang@...eedtech.com>
Reviewed-by: Dhananjay Phadke <dphadke@...ux.microsoft.com>
---
arch/arm/boot/dts/aspeed-g5.dtsi | 8 ++++++++
arch/arm/boot/dts/aspeed-g6.dtsi | 8 ++++++++
2 files changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index c89092c3905b..04f98d1dbb97 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -262,6 +262,14 @@ rng: hwrng@...e2078 {
quality = <100>;
};
+ hace: crypto@...e3000 {
+ compatible = "aspeed,ast2500-hace";
+ reg = <0x1e6e3000 0x100>;
+ interrupts = <4>;
+ clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
+ resets = <&syscon ASPEED_RESET_HACE>;
+ };
+
gfx: display@...e6000 {
compatible = "aspeed,ast2500-gfx", "syscon";
reg = <0x1e6e6000 0x1000>;
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 6660564855ff..095cf8d03616 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -323,6 +323,14 @@ apb {
#size-cells = <1>;
ranges;
+ hace: crypto@...d0000 {
+ compatible = "aspeed,ast2600-hace";
+ reg = <0x1e6d0000 0x200>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
+ resets = <&syscon ASPEED_RESET_HACE>;
+ };
+
syscon: syscon@...e2000 {
compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
reg = <0x1e6e2000 0x1000>;
--
2.25.1
Powered by blists - more mailing lists