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Date: Sun, 31 Jul 2022 19:54:13 +0800 From: Yi Liu <yi.l.liu@...el.com> To: Lu Baolu <baolu.lu@...ux.intel.com>, Joerg Roedel <joro@...tes.org>, Jason Gunthorpe <jgg@...dia.com>, Christoph Hellwig <hch@...radead.org>, Kevin Tian <kevin.tian@...el.com>, Ashok Raj <ashok.raj@...el.com>, "Will Deacon" <will@...nel.org>, Robin Murphy <robin.murphy@....com>, "Jean-Philippe Brucker" <jean-philippe@...aro.com>, Dave Jiang <dave.jiang@...el.com>, "Vinod Koul" <vkoul@...nel.org> CC: Eric Auger <eric.auger@...hat.com>, Jacob jun Pan <jacob.jun.pan@...el.com>, Zhangfei Gao <zhangfei.gao@...aro.org>, Zhu Tony <tony.zhu@...el.com>, <iommu@...ts.linux.dev>, <linux-kernel@...r.kernel.org>, Jean-Philippe Brucker <jean-philippe@...aro.org> Subject: Re: [PATCH v10 01/12] iommu: Add max_pasids field in struct iommu_device On 2022/7/5 13:06, Lu Baolu wrote: > Use this field to keep the number of supported PASIDs that an IOMMU > hardware is able to support. This is a generic attribute of an IOMMU a nit. it should be the max pasid value an IOMMU hardware can support instead of number of PASIDs. right? Reviewed-by: Yi Liu <yi.l.liu@...el.com> > and lifting it into the per-IOMMU device structure makes it possible > to allocate a PASID for device without calls into the IOMMU drivers. > Any iommu driver that supports PASID related features should set this > field before enabling them on the devices. > > In the Intel IOMMU driver, intel_iommu_sm is moved to CONFIG_INTEL_IOMMU > enclave so that the pasid_supported() helper could be used in dmar.c > without compilation errors. > > Signed-off-by: Lu Baolu <baolu.lu@...ux.intel.com> > Reviewed-by: Jean-Philippe Brucker <jean-philippe@...aro.org> > Reviewed-by: Kevin Tian <kevin.tian@...el.com> > Tested-by: Zhangfei Gao <zhangfei.gao@...aro.org> > Tested-by: Tony Zhu <tony.zhu@...el.com> > --- > include/linux/intel-iommu.h | 3 ++- > include/linux/iommu.h | 2 ++ > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 1 + > drivers/iommu/intel/dmar.c | 7 +++++++ > 4 files changed, 12 insertions(+), 1 deletion(-) > > diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h > index 4f29139bbfc3..e065cbe3c857 100644 > --- a/include/linux/intel-iommu.h > +++ b/include/linux/intel-iommu.h > @@ -479,7 +479,6 @@ enum { > #define VTD_FLAG_IRQ_REMAP_PRE_ENABLED (1 << 1) > #define VTD_FLAG_SVM_CAPABLE (1 << 2) > > -extern int intel_iommu_sm; > extern spinlock_t device_domain_lock; > > #define sm_supported(iommu) (intel_iommu_sm && ecap_smts((iommu)->ecap)) > @@ -786,6 +785,7 @@ struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus, > extern const struct iommu_ops intel_iommu_ops; > > #ifdef CONFIG_INTEL_IOMMU > +extern int intel_iommu_sm; > extern int iommu_calculate_agaw(struct intel_iommu *iommu); > extern int iommu_calculate_max_sagaw(struct intel_iommu *iommu); > extern int dmar_disabled; > @@ -802,6 +802,7 @@ static inline int iommu_calculate_max_sagaw(struct intel_iommu *iommu) > } > #define dmar_disabled (1) > #define intel_iommu_enabled (0) > +#define intel_iommu_sm (0) > #endif > > static inline const char *decode_prq_descriptor(char *str, size_t size, > diff --git a/include/linux/iommu.h b/include/linux/iommu.h > index 5e1afe169549..03fbb1b71536 100644 > --- a/include/linux/iommu.h > +++ b/include/linux/iommu.h > @@ -318,12 +318,14 @@ struct iommu_domain_ops { > * @list: Used by the iommu-core to keep a list of registered iommus > * @ops: iommu-ops for talking to this iommu > * @dev: struct device for sysfs handling > + * @max_pasids: number of supported PASIDs > */ > struct iommu_device { > struct list_head list; > const struct iommu_ops *ops; > struct fwnode_handle *fwnode; > struct device *dev; > + u32 max_pasids; > }; > > /** > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index 88817a3376ef..ae8ec8df47c1 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -3546,6 +3546,7 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) > /* SID/SSID sizes */ > smmu->ssid_bits = FIELD_GET(IDR1_SSIDSIZE, reg); > smmu->sid_bits = FIELD_GET(IDR1_SIDSIZE, reg); > + smmu->iommu.max_pasids = 1UL << smmu->ssid_bits; > > /* > * If the SMMU supports fewer bits than would fill a single L2 stream > diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c > index 592c1e1a5d4b..6c338888061a 100644 > --- a/drivers/iommu/intel/dmar.c > +++ b/drivers/iommu/intel/dmar.c > @@ -1123,6 +1123,13 @@ static int alloc_iommu(struct dmar_drhd_unit *drhd) > > raw_spin_lock_init(&iommu->register_lock); > > + /* > + * A value of N in PSS field of eCap register indicates hardware > + * supports PASID field of N+1 bits. > + */ > + if (pasid_supported(iommu)) > + iommu->iommu.max_pasids = 2UL << ecap_pss(iommu->ecap); > + > /* > * This is only for hotplug; at boot time intel_iommu_enabled won't > * be set yet. When intel_iommu_init() runs, it registers the units -- Regards, Yi Liu
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