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Message-Id: <20220801194448.29363-4-william.zhang@broadcom.com>
Date: Mon, 1 Aug 2022 12:44:48 -0700
From: William Zhang <william.zhang@...adcom.com>
To: Linux ARM List <linux-arm-kernel@...ts.infradead.org>
Cc: f.fainelli@...il.com, anand.gore@...adcom.com,
dan.beygelman@...adcom.com, joel.peshkin@...adcom.com,
Broadcom Kernel List <bcm-kernel-feedback-list@...adcom.com>,
kursad.oney@...adcom.com,
William Zhang <william.zhang@...adcom.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 4/4] ARM: dts: bcmbca: bcm63178: cosmetic change
Add new line between dts node.
Signed-off-by: William Zhang <william.zhang@...adcom.com>
---
arch/arm/boot/dts/bcm63178.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/bcm63178.dtsi b/arch/arm/boot/dts/bcm63178.dtsi
index dba71fa53466..cbd094dde6d0 100644
--- a/arch/arm/boot/dts/bcm63178.dtsi
+++ b/arch/arm/boot/dts/bcm63178.dtsi
@@ -32,6 +32,7 @@ CA7_1: cpu@1 {
next-level-cache = <&L2_0>;
enable-method = "psci";
};
+
CA7_2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a7";
@@ -39,6 +40,7 @@ CA7_2: cpu@2 {
next-level-cache = <&L2_0>;
enable-method = "psci";
};
+
L2_0: l2-cache0 {
compatible = "cache";
};
--
2.34.1
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