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Message-Id: <20220801210237.1501488-1-robh@kernel.org>
Date:   Mon,  1 Aug 2022 15:02:37 -0600
From:   Rob Herring <robh@...nel.org>
To:     Vinod Koul <vkoul@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     dmaengine@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH v2] dt-bindings: dma: arm,pl330: Add missing 'iommus' property

The pl330 can be behind an IOMMU which is the case for Arm Juno board.
Add the 'iommus' property allowing for 1 IOMMU entry per channel for
writes and 1 IOMMU entry for reads.

Signed-off-by: Rob Herring <robh@...nel.org>
---
v2:
 - Include IOMMU entry for read channel
---
 Documentation/devicetree/bindings/dma/arm,pl330.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/dma/arm,pl330.yaml b/Documentation/devicetree/bindings/dma/arm,pl330.yaml
index 2bec69b308f8..4a3dd6f5309b 100644
--- a/Documentation/devicetree/bindings/dma/arm,pl330.yaml
+++ b/Documentation/devicetree/bindings/dma/arm,pl330.yaml
@@ -55,6 +55,12 @@ properties:
 
   dma-coherent: true
 
+  iommus:
+    minItems: 1
+    maxItems: 9
+    description: Up to 1 IOMMU entry per DMA channel for writes and 1
+      IOMMU entry for reads.
+
   power-domains:
     maxItems: 1
 
-- 
2.34.1

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