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Message-ID: <a9568128-172a-6693-c059-7b2be2cafb97@birger-koblitz.de>
Date: Mon, 1 Aug 2022 08:19:57 +0200
From: Birger Koblitz <mail@...ger-koblitz.de>
To: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Cc: linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org,
bert@...t.com, sander@...nheule.net
Subject: [PATCH 4/7] spi: realtek-rtl: add parallel IO suppport
The Realtek SoCs are capable of dual and/or quad IO.
Add a function to enable this functionality.
Signed-off-by: Birger Koblitz <mail@...ger-koblitz.de>
---
drivers/spi/spi-realtek-rtl.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/spi/spi-realtek-rtl.c b/drivers/spi/spi-realtek-rtl.c
index 5979233522f4..25a90493bf6e 100644
--- a/drivers/spi/spi-realtek-rtl.c
+++ b/drivers/spi/spi-realtek-rtl.c
@@ -25,6 +25,9 @@ struct rtspi {
#define RTL_SPI_SFCSR_CSB3 BIT(14)
#define RTL_SPI_SFCSR_RDY BIT(27)
#define RTL_SPI_SFCSR_CS BIT(24)
+#define RTL_SPI_SFCSR_WIDTH_MASK ~(0x03 << 25)
+#define RTL_SPI_SFCSR_WIDTH_DUAL (0x01 << 25)
+#define RTL_SPI_SFCSR_WIDTH_QUAD (0x02 << 25)
#define RTL_SPI_SFCSR_LEN_MASK ~(0x03 << 28)
#define RTL_SPI_SFCSR_LEN1 (0x00 << 28)
#define RTL_SPI_SFCSR_LEN4 (0x03 << 28)
@@ -118,6 +121,25 @@ static void rcv1(struct rtspi *rtspi, u8 *buf)
*buf = readl(REG(RTL_SPI_SFDR)) >> 24;
}
+static void set_mode(struct rtspi *rtspi, unsigned int mode)
+{
+ u32 value;
+
+ value = readl(REG(RTL_SPI_SFCSR));
+ value &= RTL_SPI_SFCSR_WIDTH_MASK;
+ switch (mode) {
+ case SPI_NBITS_QUAD:
+ value |= RTL_SPI_SFCSR_WIDTH_QUAD;
+ break;
+ case SPI_NBITS_DUAL:
+ value |= RTL_SPI_SFCSR_WIDTH_DUAL;
+ break;
+ default:
+ break;
+ }
+ writel(value, REG(RTL_SPI_SFCSR));
+}
+
static int transfer_one(struct spi_controller *ctrl, struct spi_device *spi,
struct spi_transfer *xfer)
{
--
2.25.1
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