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Message-ID: <20220801094255.664548-2-nagasuresh.relli@microchip.com>
Date: Mon, 1 Aug 2022 15:12:54 +0530
From: Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>
To: <broonie@...nel.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <conor.dooley@...rochip.com>
CC: <linux-spi@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>
Subject: [PATCH 1/2] spi: dt-binding: add Microchip CoreQSPI compatible
Add compatible string for Microchip CoreQSPI controller.
Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>
---
.../devicetree/bindings/spi/microchip,mpfs-spi.yaml | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
index 7326c0a28d16..b65f4e070796 100644
--- a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
+++ b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
@@ -14,9 +14,13 @@ allOf:
properties:
compatible:
- enum:
- - microchip,mpfs-spi
- - microchip,mpfs-qspi
+ oneOf:
+ - description: Microchip's Polarfire SoC SPI controller.
+ const: microchip,mpfs-spi
+ - description: Microchip's Polarfire SoC QSPI controller.
+ const: microchip,mpfs-qspi
+ - description: Microchip's FPGA QSPI controller.
+ const: microchip,coreqspi-rtl-v2
reg:
maxItems: 1
--
2.25.1
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