linux-kernel - [PATCH 5.18 84/88] EDAC/synopsys: Use the correct register to disable the error interrupt on v3 hw

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Message-Id: <20220801114141.823982430@linuxfoundation.org>
Date:   Mon,  1 Aug 2022 13:47:38 +0200
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, Sherry Sun <sherry.sun@....com>,
        Borislav Petkov <bp@...e.de>,
        Shubhrajyoti Datta <Shubhrajyoti.datta@...inx.com>,
        Michal Simek <michal.simek@...inx.com>
Subject: [PATCH 5.18 84/88] EDAC/synopsys: Use the correct register to disable the error interrupt on v3 hw

From: Sherry Sun <sherry.sun@....com>

commit be76ceaf03bc04e74be5e28f608316b73c2b04ad upstream.

v3.x Synopsys EDAC DDR doesn't have the QOS Interrupt register. Use the
ECC Clear Register to disable the error interrupts instead.

Fixes: f7824ded4149 ("EDAC/synopsys: Add support for version 3 of the Synopsys EDAC DDR")
Signed-off-by: Sherry Sun <sherry.sun@....com>
Signed-off-by: Borislav Petkov <bp@...e.de>
Reviewed-by: Shubhrajyoti Datta <Shubhrajyoti.datta@...inx.com>
Acked-by: Michal Simek <michal.simek@...inx.com>
Cc: <stable@...r.kernel.org>
Link: https://lore.kernel.org/r/20220427015137.8406-2-sherry.sun@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
 drivers/edac/synopsys_edac.c |    7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

--- a/drivers/edac/synopsys_edac.c
+++ b/drivers/edac/synopsys_edac.c
@@ -865,8 +865,11 @@ static void enable_intr(struct synps_eda
 static void disable_intr(struct synps_edac_priv *priv)
 {
 	/* Disable UE/CE Interrupts */
-	writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK,
-			priv->baseaddr + DDR_QOS_IRQ_DB_OFST);
+	if (priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR)
+		writel(0x0, priv->baseaddr + ECC_CLR_OFST);
+	else
+		writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK,
+		       priv->baseaddr + DDR_QOS_IRQ_DB_OFST);
 }
 
 static int setup_irq(struct mem_ctl_info *mci,