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Message-Id: <20220801131554.116795-6-frieder@fris.de>
Date:   Mon,  1 Aug 2022 15:15:49 +0200
From:   Frieder Schrempf <frieder@...s.de>
To:     devicetree@...r.kernel.org,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Rob Herring <robh+dt@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Shawn Guo <shawnguo@...nel.org>
Cc:     Fabio Estevam <festevam@...il.com>,
        Frieder Schrempf <frieder.schrempf@...tron.de>,
        Heiko Thiery <heiko.thiery@...il.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        NXP Linux Team <linux-imx@....com>,
        Pengutronix Kernel Team <kernel@...gutronix.de>
Subject: [PATCH v2 5/8] arm64: dts: imx8mm-kontron: Remove low DDRC operating point

From: Frieder Schrempf <frieder.schrempf@...tron.de>

For some reason there is a problem with finding a DDR configuration
that works on all operating points and all LPDDR4 types used on the
SoM. Therefore the bootloader currently doesn't configure the lowest
of the three operating points. Let's also skip this in the kernel
devicetree to make sure it isn't used.

Signed-off-by: Frieder Schrempf <frieder.schrempf@...tron.de>
---
Changes in v2:
* none
---
 arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
index 77c074b491a6..2d0661cce89b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
@@ -46,10 +46,6 @@ &ddrc {
 	ddrc_opp_table: opp-table {
 		compatible = "operating-points-v2";
 
-		opp-25M {
-			opp-hz = /bits/ 64 <25000000>;
-		};
-
 		opp-100M {
 			opp-hz = /bits/ 64 <100000000>;
 		};
-- 
2.37.1

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