linux-kernel - Re: [PATCH 2/2] dt-bindings: gce: add gce header file for mt8188

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Message-ID: <995fbb2b-2b34-d407-6bfd-4798de2251d7@linaro.org>
Date:   Tue, 2 Aug 2022 10:08:23 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Elvis Wang <Elvis.Wang@...iatek.com>,
        Jassi Brar <jassisinghbrar@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        CK Hu <ck.hu@...iatek.com>
Cc:     linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH 2/2] dt-bindings: gce: add gce header file for mt8188

On 29/07/2022 10:43, Elvis Wang wrote:
> Add gce header file to define the gce subsys id, hardware event id and
> constant for mt8188.
> 
> Signed-off-by: Elvis Wang <Elvis.Wang@...iatek.com>
> ---
>  include/dt-bindings/gce/mt8188-gce.h | 1079 ++++++++++++++++++++++++++
>  1 file changed, 1079 insertions(+)
>  create mode 100644 include/dt-bindings/gce/mt8188-gce.h
> 
> diff --git a/include/dt-bindings/gce/mt8188-gce.h b/include/dt-bindings/gce/mt8188-gce.h
> new file mode 100644
> index 000000000000..b15e965fe671
> --- /dev/null
> +++ b/include/dt-bindings/gce/mt8188-gce.h

Use vendor in filename, so mediatek,mt8188-gce.h

> @@ -0,0 +1,1079 @@
> +/* SPDX-License-Identifier: GPL-2.0 */

Dual license.

> +/*
> + * Copyright (c) 2018 MediaTek Inc.
> + *
> + */
> +#ifndef _DT_BINDINGS_GCE_MT8188_H
> +#define _DT_BINDINGS_GCE_MT8188_H
> +
> +/* assign timeout 0 also means default */
> +#define CMDQ_NO_TIMEOUT		0xffffffff
> +#define CMDQ_TIMEOUT_DEFAULT	1000

How CMDQ_TIMEOUT_DEFAULT is part of bindings? How is it related to bindings?

> +
> +/* GCE thread priority */
> +#define CMDQ_THR_PRIO_LOWEST	0
> +#define CMDQ_THR_PRIO_1		1
> +#define CMDQ_THR_PRIO_2		2
> +#define CMDQ_THR_PRIO_3		3
> +#define CMDQ_THR_PRIO_4		4
> +#define CMDQ_THR_PRIO_5		5
> +#define CMDQ_THR_PRIO_6		6
> +#define CMDQ_THR_PRIO_HIGHEST	7
> +
> +/* CPR count in 32bit register */
> +#define GCE_CPR_COUNT		1312

No register values in the bindings.



> +
> +/* GCE subsys table */
> +#define SUBSYS_1400XXXX		0
> +#define SUBSYS_1401XXXX		1
> +#define SUBSYS_1402XXXX		2
> +#define SUBSYS_1c00XXXX		3
> +#define SUBSYS_1c01XXXX		4
> +#define SUBSYS_1c02XXXX		5
> +#define SUBSYS_1c10XXXX		6
> +#define SUBSYS_1c11XXXX		7
> +#define SUBSYS_1c12XXXX		8
> +#define SUBSYS_14f0XXXX		9
> +#define SUBSYS_14f1XXXX		10
> +#define SUBSYS_14f2XXXX		11
> +#define SUBSYS_1800XXXX		12
> +#define SUBSYS_1801XXXX		13
> +#define SUBSYS_1802XXXX		14
> +#define SUBSYS_1803XXXX		15
> +#define SUBSYS_1032XXXX		16
> +#define SUBSYS_1033XXXX		17
> +#define SUBSYS_1600XXXX		18
> +#define SUBSYS_1601XXXX		19
> +#define SUBSYS_14e0XXXX		20
> +#define SUBSYS_1c20XXXX		21
> +#define SUBSYS_1c30XXXX		22
> +#define SUBSYS_1c40XXXX		23
> +#define SUBSYS_1c50XXXX		24
> +#define SUBSYS_1c60XXXX		25
> +#define SUBSYS_NO_SUPPORT	99
> +
> +/* GCE General Purpose Register (GPR) support
> + * Leave note for scenario usage here
> + */
> +/* GCE: write mask */
> +#define GCE_GPR_R00		0x00
> +#define GCE_GPR_R01		0x01

No. These are no bindings. Do not embed device programming model into
bindings header. I'll stop review.


Best regards,
Krzysztof