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Message-ID: <CAK8P3a0GFeWY-SuXsbP9z8CZa_8tL9FT+8Xx=VVUA2KhdTT6gA@mail.gmail.com>
Date: Tue, 2 Aug 2022 10:28:27 +0200
From: Arnd Bergmann <arnd@...db.de>
To: Christophe Leroy <christophe.leroy@...roup.eu>
Cc: Segher Boessenkool <segher@...nel.crashing.org>,
Arnd Bergmann <arnd@...db.de>,
"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
Pali Rohár <pali@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: Regression: Linux v5.15+ does not boot on Freescale P2020
On Tue, Aug 2, 2022 at 8:47 AM Christophe Leroy
<christophe.leroy@...roup.eu> wrote:
> Le 26/07/2022 à 15:44, Segher Boessenkool a écrit :
> > Whoops :-) We need fixes for processor implementation bugs all the
> > time of course, but this is a massive *design* bug. I'm surprised this
> > CPU still works as well as it does!
>
> "Programming Environments Manual for 32-Bit Implementations of the
> PowerPC™ Architecture" §4.1.2.2.2 says: "Invalid forms result when a bit
> or operand is coded incorrectly, for example, or when a reserved bit
> (shown as ‘0’) is coded as ‘1’."
> >
> > Also people using an SMP kernel on older cores should see the problem,
> > no? Or is that patched out? Or does this use case never happen :-)
It doesn't get patched out, I think it's just not a combination that anyone
tests on. The few defconfig files for SMP 85xx tend to be e500mc (which
is incompatible with the older cores).
> Maybe unlike e500, older cores ignore the EH bit and don't mind when
> it's set to 1 ?
Pretty sure this is the case. My interpretation is that Freescale and IBM
just interpreted the spec differently at the time and were not even aware
of the difference until it was too late.
Arnd
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