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Message-ID: <YukTfuX3QmKV4msI@yaz-fattaah>
Date: Tue, 2 Aug 2022 12:07:26 +0000
From: Yazen Ghannam <yazen.ghannam@....com>
To: Tony Luck <tony.luck@...el.com>
Cc: bp@...en8.de, linux-kernel@...r.kernel.org,
patches@...ts.linux.dev, x86@...nel.org
Subject: Re: [PATCH] RAS/CEC: Reduce offline page threshold for Intel systems
On Fri, Jul 01, 2022 at 12:12:39PM -0700, Tony Luck wrote:
> A large scale study of memory errors on Intel systems in data centers
> showed that aggressively taking pages with corrected errors offline is
> the best strategy of using corrected errors as a predictor of future
> uncorrected errors.
>
> It is unknown whether this would help other vendors. There are some
> indicators that it would not.
>
> Set the threshold to "2" on Intel systems.
>
> Do-not-apply-without-agreement-from-AMD
> Signed-off-by: Tony Luck <tony.luck@...el.com>
Hi Tony,
The guidance from our hardware folks is that this isn't necessary for our
systems. So I think restricting this to Intel systems is okay.
> ---
> drivers/ras/cec.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/ras/cec.c b/drivers/ras/cec.c
> index 42f2fc0bc8a9..b1fc193b2036 100644
> --- a/drivers/ras/cec.c
> +++ b/drivers/ras/cec.c
> @@ -556,6 +556,14 @@ static int __init cec_init(void)
> if (ce_arr.disabled)
> return -ENODEV;
>
> + /*
> + * Intel systems may avoid uncorreectable errors
> + * if pages with corrected errors are aggresively
> + * taken offline.
> + */
s/uncorreectable/uncorrectable/
s/aggresively/aggressively/
> + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
> + action_threshold = 2;
> +
> ce_arr.array = (void *)get_zeroed_page(GFP_KERNEL);
> if (!ce_arr.array) {
> pr_err("Error allocating CE array page!\n");
> --
Looks good to me overall.
Reviewed-by: Yazen Ghannam <yazen.ghannam@....com>
Thanks,
Yazen
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