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Message-ID: <YulxX3Zo168cWhwP@sirena.org.uk>
Date: Tue, 2 Aug 2022 19:47:59 +0100
From: Mark Brown <broonie@...nel.org>
To: Sudip Mukherjee <sudip.mukherjee@...ive.com>
Cc: Serge Semin <fancer.lancer@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
greentime.hu@...ive.com, jude.onyenegecha@...ive.com,
william.salmon@...ive.com, adnan.chowdhury@...ive.com,
ben.dooks@...ive.com, linux-spi@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
jeegar.lakhani@...ive.com
Subject: Re: [PATCH 01/11] spi: dw: define capability for enhanced spi
On Tue, Aug 02, 2022 at 06:57:45PM +0100, Sudip Mukherjee wrote:
> Some Synopsys SSI controllers support enhanced SPI which includes
> Dual mode, Quad mode and Octal mode. Define the capability and mention
> it in the controller supported modes.
> +#define DW_SPI_CAP_EXT_SPI BIT(2)
This isn't at all descriptive, it'd be better to have a capability bit
for the various multi-line data modes (or possibly individual bits for
them, though board setup will stop us using things that aren't supported
in a given design anyway so it's a bit redundant) - that'd be a lot
clearer and avoid confusion further down the line when some other
feature gets added.
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