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Message-ID: <e49e5b1f-d178-3e39-87f1-1cccba31ace1@kernel.org>
Date: Thu, 4 Aug 2022 09:00:26 +0200
From: Jiri Slaby <jirislaby@...nel.org>
To: Douglas Anderson <dianders@...omium.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: Mark Brown <broonie@...nel.org>, Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Vijaya Krishna Nivarthi <quic_vnivarth@...cinc.com>,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-serial@...r.kernel.org
Subject: Re: [PATCH] tty: serial: qcom-geni-serial: Fix %lu -> %u in print
statements
On 02. 08. 22, 22:23, Douglas Anderson wrote:
> When we multiply an unsigned int by a u32 we still end up with an
> unsigned int. That means we should specify "%u" not "%lu" in the
> format code.
>
> NOTE: this fix was chosen instead of somehow promoting the value to
> "unsigned long" since the max baud rate from the earlier call to
> uart_get_baud_rate() is 4000000 and the max sampling rate is 32.
> 4000000 * 32 = 0x07a12000, not even close to overflowing 32-bits.
Acked-by: Jiri Slaby <jirislaby@...nel.org>
I wonder, how this became unnoticed by the 0day bot?
> Fixes: c474c775716e ("tty: serial: qcom-geni-serial: Fix get_clk_div_rate() which otherwise could return a sub-optimal clock rate.")
> Reported-by: Mark Brown <broonie@...nel.org>
> Signed-off-by: Douglas Anderson <dianders@...omium.org>
> ---
>
> drivers/tty/serial/qcom_geni_serial.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c
> index f754619451dc..f7c1f1807040 100644
> --- a/drivers/tty/serial/qcom_geni_serial.c
> +++ b/drivers/tty/serial/qcom_geni_serial.c
> @@ -1033,12 +1033,12 @@ static void qcom_geni_serial_set_termios(struct uart_port *uport,
> sampling_rate, &clk_div);
> if (!clk_rate) {
> dev_err(port->se.dev,
> - "Couldn't find suitable clock rate for %lu\n",
> + "Couldn't find suitable clock rate for %u\n",
> baud * sampling_rate);
> goto out_restart_rx;
> }
>
> - dev_dbg(port->se.dev, "desired_rate-%lu, clk_rate-%lu, clk_div-%u\n",
> + dev_dbg(port->se.dev, "desired_rate-%u, clk_rate-%lu, clk_div-%u\n",
> baud * sampling_rate, clk_rate, clk_div);
>
> uport->uartclk = clk_rate;
--
js
suse labs
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