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Message-ID: <CAHyZL-ftLQNg2eTsmSXRSpHUNzNyTEt+UUGCUs2XqvRgeiWRrg@mail.gmail.com>
Date:   Thu, 4 Aug 2022 10:43:00 +0100
From:   Sudip Mukherjee <sudip.mukherjee@...ive.com>
To:     Serge Semin <fancer.lancer@...il.com>
Cc:     Mark Brown <broonie@...nel.org>, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Greentime Hu <greentime.hu@...ive.com>,
        Jude Onyenegecha <jude.onyenegecha@...ive.com>,
        William Salmon <william.salmon@...ive.com>,
        Adnan Chowdhury <adnan.chowdhury@...ive.com>,
        Ben Dooks <ben.dooks@...ive.com>, linux-spi@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Jeegar Lakhani <jeegar.lakhani@...ive.com>
Subject: Re: [PATCH 00/11] Add support for enhanced SPI for Designware SPI controllers

On Wed, Aug 3, 2022 at 7:56 PM Serge Semin <fancer.lancer@...il.com> wrote:
>
> Hi Sudip
>
> On Tue, Aug 02, 2022 at 06:57:44PM +0100, Sudip Mukherjee wrote:
> > Some Synopsys SSI controllers support enhanced SPI which includes
> > Dual mode, Quad mode and Octal mode. DWC_ssi includes clock stretching
> > feature in enhanced SPI modes which can be used to prevent FIFO underflow
> > and overflow conditions while transmitting or receiving the data respectively.
> > This is only tested on controller version 1.03a.
> >
> > Ben Dooks (1):
> >   spi: dw-apb-ssi: add generic 1.03a version
>
> Thanks for the patchset. It's always welcome to have a new
> functionality support. I'll have it reviewed on the next week.

Thanks Sergey. I will then wait for your review before sending a v2
with the changes Mark has suggested.

--
Regards
Sudip

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