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Message-ID: <5b65d6c2-7ca8-b963-24f7-1d02328fcad3@linaro.org>
Date: Thu, 4 Aug 2022 13:35:44 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Mark Brown <broonie@...nel.org>
Cc: Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor.dooley@...rochip.com, linux-spi@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] spi: dt-binding: add Microchip CoreQSPI compatible
On 04/08/2022 13:31, Krzysztof Kozlowski wrote:
>> I'm not convinced this is a useful rule to try to enforce, and I'm not
>> sure how well it will work if the same IP is used in several different
>> places. It's not clear to me what the benefit is intended to be.
>
> First, the description here is really not adding any useful information.
>
> "description: Microchip's Polarfire SoC SPI controller."
> Microchip - already in comaptible
> SPI controller - already in compatible and in device description
>
> The only useful piece could be extending pfs to Polarfire SoC.
>
> And now imagine every binding doing the same, adding such
> acronym-explanations in every compatible list. Basically we loose easy
> to read, compare, analyze and check for errors enum:
> enum
> - microchip,mpfs-spi
> - microchip,mpfs-qspi
> - microchip,coreqspi-rtl-v2
> - microchip,mpfs-some-more-spi
> - microchip,mpfs-even-newer-spi
>
> into double-sized oneOf with additional descriptions each one explaining
> "mpfs".
>
> oneOf:
> - description: Microchip's Polarfire SoC SPI controller.
> const: microchip,mpfs-spi
> - description: Microchip's Polarfire SoC QSPI controller.
> const: microchip,mpfs-qspi
> - description: Microchip's FPGA QSPI controller.
> const: microchip,coreqspi-rtl-v2
Just to be more specific - this one description actually brings useful
information (FPGA)... This can be easily added as a comment, if anyone
finds it useful:
enum
- microchip,mpfs-spi
- microchip,mpfs-qspi
- microchip,coreqspi-rtl-v2 # FPGA QSPI
Best regards,
Krzysztof
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