linux-kernel - RE: [PATCH 1/1] x86: Change mov $0, %reg with xor %reg, %reg

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Message-ID: <126271e264204581a42b079b51481740@AcuMS.aculab.com>
Date:   Fri, 5 Aug 2022 09:26:02 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'Kanna Scarlet' <knscarlet@...weeb.org>,
        Borislav Petkov <bp@...en8.de>
CC:     Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>,
        "Dave Hansen" <dave.hansen@...ux.intel.com>,
        "H. Peter Anvin" <hpa@...or.com>,
        "x86@...nel.org" <x86@...nel.org>,
        Ard Biesheuvel <ardb@...nel.org>,
        "Bill Metzenthen" <billm@...bpc.org.au>,
        Brijesh Singh <brijesh.singh@....com>,
        Joerg Roedel <jroedel@...e.de>,
        Josh Poimboeuf <jpoimboe@...nel.org>,
        "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        Mark Rutland <mark.rutland@....com>,
        Michael Roth <michael.roth@....com>,
        Peter Zijlstra <peterz@...radead.org>,
        Sean Christopherson <seanjc@...gle.com>,
        "Steven Rostedt" <rostedt@...dmis.org>,
        Ammar Faizi <ammarfaizi2@...weeb.org>,
        GNU/Weeb Mailing List <gwml@...r.gnuweeb.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 1/1] x86: Change mov $0, %reg with xor %reg, %reg

From: Kanna Scarlet
> Sent: 04 August 2022 19:08
> 
> On 8/4/22 10:53 PM, Borislav Petkov wrote:
> > Bonus points if you find out what other advantage
> >
> > XOR reg,reg
> >
> > has when it comes to clearing integer registers.
> 
> Hello sir Borislav,
> 
> Thank you for your response. I tried to find out other advantages of
> xor reg,reg on Google and found this:
> https://stackoverflow.com/a/33668295/7275114
> 
>   "xor (being a recognized zeroing idiom, unlike mov reg, 0) has some
>   obvious and some subtle advantages:
> 
>   1. smaller code-size than mov reg,0. (All CPUs)
>   2. avoids partial-register penalties for later code.
>      (Intel P6-family and SnB-family).
>   3. doesn't use an execution unit, saving power and freeing up
>      execution resources. (Intel SnB-family)
>   4. smaller uop (no immediate data) leaves room in the uop cache-line
>      for nearby instructions to borrow if needed. (Intel SnB-family).
>   5. doesn't use up entries in the physical register file. (Intel
>      SnB-family (and P4) at least, possibly AMD as well since they use
>      a similar PRF design instead of keeping register state in the ROB
>      like Intel P6-family microarchitectures.)"

You missed one, and an additional change:

Use "xor %rax,%rax" instead of "xor %eax,%eax" to save
the 'reg' prefix.

	David

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