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Message-Id: <20220805162844.1554247-1-mail@conchuod.ie>
Date: Fri, 5 Aug 2022 17:28:42 +0100
From: Conor Dooley <mail@...chuod.ie>
To: Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>
Cc: Daniel Lezcano <daniel.lezcano@...aro.org>,
Anup Patel <anup@...infault.org>,
Conor Dooley <conor.dooley@...rochip.com>,
Guo Ren <guoren@...nel.org>,
Sagar Kadam <sagar.kadam@...ive.com>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org, qemu-riscv@...gnu.org
Subject: [PATCH 0/3] Fix dt-validate issues on qemu dtbdumps due to dt-bindings
From: Conor Dooley <conor.dooley@...rochip.com>
The device trees produced automatically for the virt and spike machines
fail dt-validate on several grounds. Some of these need to be fixed in
the linux kernel's dt-bindings, but others are caused by bugs in QEMU.
Patches been sent that fix the QEMU issues [0], but a couple of them
need to be fixed in the kernel's dt-bindings. The first patches add
compatibles for "riscv,{clint,plic}0" which are present in drivers and
the auto generated QEMU dtbs. The final patch adds some new ISA strings
which needs scruitiny from someone with more knowledge about what ISA
extension strings should be reported in a dt than I have.
Thanks to Rob Herring for reporting these issues [1],
Conor.
To reproduce the errors:
./build/qemu-system-riscv64 -nographic -machine virt,dumpdtb=qemu.dtb
dt-validate -p /path/to/linux/kernel/Documentation/devicetree/bindings/processed-schema.json qemu.dtb
(The processed schema needs to be generated first)
0 - https://lore.kernel.org/linux-riscv/20220805155405.1504081-1-mail@conchuod.ie
1 - https://lore.kernel.org/linux-riscv/20220803170552.GA2250266-robh@kernel.org/
Conor Dooley (3):
dt-bindings: timer: sifive,clint: add legacy riscv compatible
dt-bindings: interrupt-controller: sifive,plic: add legacy riscv
compatible
dt-bindings: riscv: add new riscv,isa strings for emulators
.../sifive,plic-1.0.0.yaml | 5 +++++
.../devicetree/bindings/riscv/cpus.yaml | 2 ++
.../bindings/timer/sifive,clint.yaml | 18 ++++++++++++------
3 files changed, 19 insertions(+), 6 deletions(-)
base-commit: 42d670bda02fdba0f3944c92f545984501e5788d
--
2.37.1
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