linux-kernel - Re: [PATCH v3 2/3] ARM: dts: qcom: msm8960: add the device node of USB1

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Date:   Tue, 9 Aug 2022 16:11:32 -0500
From:   Bjorn Andersson <bjorn.andersson@...aro.org>
To:     Shinjo Park <peremen@...il.com>
Cc:     David Heidelberg <david@...t.cz>, Andy Gross <agross@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/3] ARM: dts: qcom: msm8960: add the device node of
 USB1

On Wed 03 Aug 02:46 CDT 2022, Shinjo Park wrote:

> Use the same USB definition as qcom-apq8064.dtsi, tested on Casio GzOne.
> 

I think this looks good, but I have a v2 of patch 1 and a v3 of patch 2,
and I don't seem to have patch 3 in my inbox(?)

Can you please resubmit the 3 patches with a --cover-letter, instead of
each patch being a reply of the previous instance of that particular
patch? This will make it much easier for me to merge the end result.

Thanks,
Bjorn

> Signed-off-by: Shinjo Park <peremen@...il.com>
> Reviewed-by: David Heidelberg <david@...t.cz>
> ---
> 
> v3:
>  - Include missing clock/qcom,lcc-msm8960.h to make cleanly applicable
> 
> v2:
>  - Rewrite commit message
>  - Reorder status line
> 
>  arch/arm/boot/dts/qcom-msm8960.dtsi | 33 +++++++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi
> index e14e1c5d1..0e099aa7c 100644
> --- a/arch/arm/boot/dts/qcom-msm8960.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
> @@ -3,6 +3,8 @@
>  
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/clock/qcom,gcc-msm8960.h>
> +#include <dt-bindings/clock/qcom,lcc-msm8960.h>
> +#include <dt-bindings/reset/qcom,gcc-msm8960.h>
>  #include <dt-bindings/mfd/qcom-rpm.h>
>  #include <dt-bindings/soc/qcom,gsbi.h>
>  
> @@ -167,6 +169,37 @@ regulators {
>  			};
>  		};
>  
> +		usb1: usb@...00000 {
> +			compatible = "qcom,ci-hdrc";
> +			reg = <0x12500000 0x200>,
> +			      <0x12500200 0x200>;
> +			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>;
> +			clock-names = "core", "iface";
> +			assigned-clocks = <&gcc USB_HS1_XCVR_CLK>;
> +			assigned-clock-rates = <60000000>;
> +			resets = <&gcc USB_HS1_RESET>;
> +			reset-names = "core";
> +			phy_type = "ulpi";
> +			ahb-burst-config = <0>;
> +			phys = <&usb_hs1_phy>;
> +			phy-names = "usb-phy";
> +			#reset-cells = <1>;
> +			status = "disabled";
> +
> +			ulpi {
> +				usb_hs1_phy: phy {
> +					compatible = "qcom,usb-hs-phy-msm8960",
> +						     "qcom,usb-hs-phy";
> +					clocks = <&sleep_clk>, <&cxo_board>;
> +					clock-names = "sleep", "ref";
> +					resets = <&usb1 0>;
> +					reset-names = "por";
> +					#phy-cells = <0>;
> +				};
> +			};
> +		};
> +
>  		acc0: clock-controller@...8000 {
>  			compatible = "qcom,kpss-acc-v1";
>  			reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
> -- 
> 2.34.1
>