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Message-ID: <1660171522-64983-1-git-send-email-lizhi.hou@amd.com>
Date: Wed, 10 Aug 2022 15:45:21 -0700
From: Lizhi Hou <lizhi.hou@....com>
To: <vkoul@...nel.org>, <dmaengine@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
CC: Lizhi Hou <lizhi.hou@....com>, <max.zhen@....com>,
<sonal.santan@....com>, <larry.liu@....com>, <brian.xu@....com>,
<trix@...hat.com>
Subject: [RESEND PATCH V1 XDMA 0/1] xilinx XDMA driver
Hello,
This V1 of patch series is to provide the platform driver to support the
Xilinx XDMA subsystem. The XDMA subsystem is used in conjunction with the
PCI Express IP block to provide high performance data transfer between host
memory and the card's DMA subsystem. It also provides up to 16 user
interrupt wires to user logic that generate interrupts to the host.
+-------+ +-------+ +-----------+
PCIe | | | | | |
Tx/Rx | | | | AXI | |
<=======> | PCIE | <===> | XDMA | <====>| User Logic|
| | | | | |
+-------+ +-------+ +-----------+
The XDMA has been used for Xilinx Alveo PCIe devices.
And it is also integrated into Versal ACAP DMA and Bridge Subsystem.
https://www.xilinx.com/products/boards-and-kits/alveo.html
https://docs.xilinx.com/r/en-US/pg344-pcie-dma-versal/Introduction-to-the-DMA-and-Bridge-Subsystems
The device driver for any FPGA based PCIe device which leverages XDMA can
call the standard dmaengine APIs to discover and use the XDMA subsystem
without duplicating the XDMA driver code in its own driver.
Lizhi Hou (1):
dmaengine: xilinx: xdma: add xilinx xdma driver
MAINTAINERS | 10 +
drivers/dma/Kconfig | 13 +
drivers/dma/xilinx/Makefile | 1 +
drivers/dma/xilinx/xdma-regs.h | 179 +++++
drivers/dma/xilinx/xdma.c | 952 +++++++++++++++++++++++++
include/linux/platform_data/amd_xdma.h | 34 +
6 files changed, 1189 insertions(+)
create mode 100644 drivers/dma/xilinx/xdma-regs.h
create mode 100644 drivers/dma/xilinx/xdma.c
create mode 100644 include/linux/platform_data/amd_xdma.h
--
2.27.0
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