lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 10 Aug 2022 09:59:15 +0100
From:   Conor Dooley <conor.dooley@...rochip.com>
To:     Conor Dooley <conor.dooley@...rochip.com>,
        Daire McNamara <daire.mcnamara@...rochip.com>
CC:     <nagasuresh.relli@...rochip.com>,
        <valentina.fernandezalanis@...rochip.com>, <broonie@...nel.org>,
        <devicetree@...r.kernel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <robh+dt@...nel.org>, <linux-kernel@...r.kernel.org>,
        <linux-spi@...r.kernel.org>, <linux-riscv@...ts.infradead.org>
Subject: [PATCH] riscv: dts: microchip: add qspi compatible fallback

The "hard" QSPI peripheral on PolarFire SoC is derived from version 2
of the FPGA IP core. The original binding had no fallback etc, so this
device tree is valid as is. There was also no functional driver for the
QSPI IP, so no device with a devicetree from a previous mainline
release will regress.

Link: https://lore.kernel.org/linux-spi/7c9f0d96-2882-964a-cd1f-916ddb3f0410@linaro.org/
Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---
See the link for binding discussion. I'll apply this at some point once
the driver makes it upstream.

CC: nagasuresh.relli@...rochip.com
CC: valentina.fernandezalanis@...rochip.com
CC: broonie@...nel.org
CC: devicetree@...r.kernel.org
CC: krzysztof.kozlowski+dt@...aro.org
CC: robh+dt@...nel.org
CC: linux-kernel@...r.kernel.org
CC: linux-spi@...r.kernel.org
CC: linux-riscv@...ts.infradead.org
---
 arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi
index 499c2e63ad35..45e3cc659882 100644
--- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
@@ -330,7 +330,7 @@ spi1: spi@...09000 {
 		};
 
 		qspi: spi@...00000 {
-			compatible = "microchip,mpfs-qspi";
+			compatible = "microchip,mpfs-qspi", "microchip,coreqspi-rtl-v2";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0x0 0x21000000 0x0 0x1000>;
-- 
2.36.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ