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Date:   Wed, 10 Aug 2022 15:31:59 +0200
From:   Patrice CHOTARD <patrice.chotard@...s.st.com>
To:     Mark Brown <broonie@...nel.org>
CC:     Alexandre Torgue <alexandre.torgue@...s.st.com>,
        <linux-spi@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <christophe.kerello@...s.st.com>
Subject: Re: [PATCH v2 1/2] spi: stm32_qspi: Add transfer_one_message() spi
 callback



On 8/10/22 15:23, Mark Brown wrote:
> On Wed, Aug 10, 2022 at 03:15:08PM +0200, Patrice CHOTARD wrote:
>> On 8/10/22 15:06, Mark Brown wrote:
> 
>>> Do we need to add something to the DT bindings to indicate that
>>> parallel-memories is valid?
> 
>> You mean in the st,stm32-qspi.yaml DT binding file ? Right i think it could be preferable to add it.
> 
> Yes.  Though I'm not clear if the bindings actually want to enforce it
> there, it's a device level property not a controller level one so it
> might not be something where controller support gets validated.

Ah yes, i see, parallel-memories should not be used in our qspi controller node.
So i can't reuse parallel-memories for my purpose.

So i need to add a new proprietary property at controller level as done in the v1 ?

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