linux-kernel - [PATCH v2] drm/amd/display: fix DSC related non-x86/PPC64 compilation issue

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Date:   Thu, 11 Aug 2022 13:57:58 -0400
From:   Hamza Mahfooz <hamza.mahfooz@....com>
To:     <linux-kernel@...r.kernel.org>
CC:     Sudip Mukherjee <sudipm.mukherjee@...il.com>,
        Hamza Mahfooz <hamza.mahfooz@....com>,
        Anders Roxell <anders.roxell@...aro.org>,
        "Harry Wentland" <harry.wentland@....com>,
        Leo Li <sunpeng.li@....com>,
        "Rodrigo Siqueira" <Rodrigo.Siqueira@....com>,
        Alex Deucher <alexander.deucher@....com>,
        Christian König <christian.koenig@....com>,
        "Pan, Xinhui" <Xinhui.Pan@....com>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        hersen wu <hersenxs.wu@....com>, Wayne Lin <Wayne.Lin@....com>,
        Fangzhi Zuo <Jerry.Zuo@....com>,
        Nicholas Kazlauskas <nicholas.kazlauskas@....com>,
        Thomas Zimmermann <tzimmermann@...e.de>,
        Roman Li <Roman.Li@....com>, <amd-gfx@...ts.freedesktop.org>,
        <dri-devel@...ts.freedesktop.org>
Subject: [PATCH v2] drm/amd/display: fix DSC related non-x86/PPC64 compilation issue

Need to protect DSC code with CONFIG_DRM_AMD_DC_DCN.
Fixes the following build errors on arm64:
ERROR: modpost: "dc_dsc_get_policy_for_timing" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERROR: modpost: "dc_dsc_compute_bandwidth_range" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!

Fixes: 0087990a9f57 ("drm/amd/display: consider DSC pass-through during mode validation")
Reported-by: Anders Roxell <anders.roxell@...aro.org>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@....com>
---
v2: Fix WERROR build failure by guarding unused variables
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c  | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index ef6c94cd852b..ce6929224a6e 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -1387,8 +1387,6 @@ bool pre_validate_dsc(struct drm_atomic_state *state,
 	return (ret == 0);
 }
 
-#endif
-
 static unsigned int kbps_from_pbn(unsigned int pbn)
 {
 	unsigned int kbps = pbn;
@@ -1416,17 +1414,19 @@ static bool is_dsc_common_config_possible(struct dc_stream_state *stream,
 
 	return bw_range->max_target_bpp_x16 && bw_range->min_target_bpp_x16;
 }
+#endif /* CONFIG_DRM_AMD_DC_DCN */
 
 enum dc_status dm_dp_mst_is_port_support_mode(
 	struct amdgpu_dm_connector *aconnector,
 	struct dc_stream_state *stream)
 {
+	int bpp, pbn, branch_max_throughput_mps = 0;
+#if defined(CONFIG_DRM_AMD_DC_DCN)
 	struct dc_link_settings cur_link_settings;
 	unsigned int end_to_end_bw_in_kbps = 0;
 	unsigned int upper_link_bw_in_kbps = 0, down_link_bw_in_kbps = 0;
 	unsigned int max_compressed_bw_in_kbps = 0;
 	struct dc_dsc_bw_range bw_range = {0};
-	int bpp, pbn, branch_max_throughput_mps = 0;
 
 	/*
 	 * check if the mode could be supported if DSC pass-through is supported
@@ -1461,13 +1461,16 @@ enum dc_status dm_dp_mst_is_port_support_mode(
 			return DC_FAIL_BANDWIDTH_VALIDATE;
 		}
 	} else {
+#endif
 		/* check if mode could be supported within full_pbn */
 		bpp = convert_dc_color_depth_into_bpc(stream->timing.display_color_depth) * 3;
 		pbn = drm_dp_calc_pbn_mode(stream->timing.pix_clk_100hz / 10, bpp, false);
 
 		if (pbn > aconnector->port->full_pbn)
 			return DC_FAIL_BANDWIDTH_VALIDATE;
+#if defined(CONFIG_DRM_AMD_DC_DCN)
 	}
+#endif
 
 	/* check is mst dsc output bandwidth branch_overall_throughput_0_mps */
 	switch (stream->timing.pixel_encoding) {
-- 
2.37.1