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Message-ID: <b51b78c7-6b75-908e-53de-6585cdd32deb@microchip.com>
Date: Thu, 11 Aug 2022 20:42:35 +0000
From: <Conor.Dooley@...rochip.com>
To: <mail@...chuod.ie>, <Daire.McNamara@...rochip.com>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>
CC: <palmer@...belt.com>, <linux-riscv@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] riscv: dts: microchip: remove ti,fifo-depth property
On 11/08/2022 21:32, Conor Dooley wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> Upgrading dt-schema to v2022.08 brings with it better handling of
> unevaluatedProperties, exposing a previously undetected missing
> property in the cadence macb dt-binding:
>
> arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: ethernet@...12000: ethernet-phy@8: Unevaluated properties are not allowed ('ti,fifo-depth' was unexpected)
> From schema: Documentation/devicetree/bindings/net/cdns,macb.yaml
>
> I know what you're thinking, the binding doesn't look to be the problem
> and I agree. I am not sure why a TI vendor property was ever actually
> added since it has no meaning... just get rid of it.
>
> Fixes: 0fa6107eca41 ("RISC-V: Initial DTS for Microchip ICICLE board")
Fixes: bc47b2217f24 ("riscv: dts: microchip: add the sundance polarberry")
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts | 2 --
> arch/riscv/boot/dts/microchip/mpfs-polarberry.dts | 2 --
> 2 files changed, 4 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
> index 044982a11df5..ee548ab61a2a 100644
> --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
> +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
> @@ -84,12 +84,10 @@ &mac1 {
>
> phy1: ethernet-phy@9 {
> reg = <9>;
> - ti,fifo-depth = <0x1>;
> };
>
> phy0: ethernet-phy@8 {
> reg = <8>;
> - ti,fifo-depth = <0x1>;
> };
> };
>
> diff --git a/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts b/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts
> index 82c93c8f5c17..dc11bb8fc833 100644
> --- a/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts
> +++ b/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts
> @@ -54,12 +54,10 @@ &mac1 {
>
> phy1: ethernet-phy@5 {
> reg = <5>;
> - ti,fifo-depth = <0x01>;
> };
>
> phy0: ethernet-phy@4 {
> reg = <4>;
> - ti,fifo-depth = <0x01>;
> };
> };
>
> --
> 2.37.1
>
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