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Message-ID: <1d81ef6a-7505-fc13-ecbf-f3ca7a6fbfce@linux.intel.com>
Date: Wed, 10 Aug 2022 17:01:55 -0700
From: Daniel Sneddon <daniel.sneddon@...ux.intel.com>
To: Dave Hansen <dave.hansen@...el.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
"Shutemov, Kirill" <kirill.shutemov@...el.com>,
"Huang, Kai" <kai.huang@...el.com>
Cc: "H. Peter Anvin" <hpa@...or.com>, linux-kernel@...r.kernel.org,
"Gomez Iglesias, Antonio" <antonio.gomez.iglesias@...el.com>,
Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
Subject: Re: [PATCH] x86/apic: Don't disable x2APIC if locked
On 8/10/22 16:44, Dave Hansen wrote:
> On 8/10/22 16:38, Daniel Sneddon wrote:
>>>
>>> config INTEL_TDX_GUEST
>>> bool "Intel TDX (Trust Domain Extensions) - Guest Support"
>>> depends on X86_64 && CPU_SUP_INTEL
>>> depends on X86_X2APIC
>> So I got some more input. SPR and newer will lock the APIC.
>
> Could you get a _little_ more clarity on this, please? Exactly how and
> when will it be locked? What does the BIOS writer's guide say? Will
> there be an explicit x2APIC lock option? Or, will it be implicitly
> locked when SGX or TDX is enabled?
The BIOS doesn't explicitly lock the APIC. The APIC will be locked if X2APIC
mode is enabled when the BIOS does an MCHECK. X2APIC mode will be enabled if
SGX or TDX are enabled. So when exactly does the BIOS do an MCHECK? That I'll
have to get clarification on.
>
>> Older products will get a ucode update, but that ucode update won't
>> include the APIClock. So, on non-SPR parts do we still want to make
>> SGX depend on X2APIC?
> Yes. It's a small price to pay.
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