linux-kernel - Re: [PATCH v3 4/4] clk: mediatek: add driver for MT8365 SoC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Thu, 11 Aug 2022 11:07:18 +0200
From:   Markus Schneider-Pargmann <msp@...libre.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Fabien Parent <parent.f@...il.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Fabien Parent <fparent@...libre.com>
Subject: Re: [PATCH v3 4/4] clk: mediatek: add driver for MT8365 SoC

Hi Krzysztof,

On Thu, Aug 11, 2022 at 11:53:19AM +0300, Krzysztof Kozlowski wrote:
> On 11/08/2022 11:44, Markus Schneider-Pargmann wrote:
> > From: Fabien Parent <fparent@...libre.com>
> > 
> > Add clock drivers for MT8365 SoC.
> > 
> > Signed-off-by: Fabien Parent <fparent@...libre.com>
> > Signed-off-by: Markus Schneider-Pargmann <msp@...libre.com>
> > ---
> > 
> > Notes:
> >     Changes in v3:
> >     - Changed all Kconfig options to be tristate
> >     - Do not depend on ARM64
> >     - Fix order of frees on probe errors.
> >     - Use mtk_clk_register_gates_with_dev
> >     - Fixed null clocks
> >     - Removed clk26m_ck
> >     - Use MUX_GATE_CLR_SET_UPD instead of custom MT8365_MUX_CLR_SET_UPD
> >     - Use devm_clk_hw_register_mux for top_misc_muxes
> >     - Use devm_clk_hw_register_gate for peri_clks and top_clks
> >     - Fix checkpatch warnings
> >     - Add missing MODULE_LICENSEs in all files
> > 
> >  drivers/clk/mediatek/Kconfig                  |   50 +
> >  drivers/clk/mediatek/Makefile                 |    7 +
> >  drivers/clk/mediatek/clk-mt8365-apu.c         |   55 +
> >  drivers/clk/mediatek/clk-mt8365-cam.c         |   57 +
> >  drivers/clk/mediatek/clk-mt8365-mfg.c         |   63 +
> >  drivers/clk/mediatek/clk-mt8365-mm.c          |  112 ++
> >  drivers/clk/mediatek/clk-mt8365-vdec.c        |   63 +
> >  drivers/clk/mediatek/clk-mt8365-venc.c        |   52 +
> >  drivers/clk/mediatek/clk-mt8365.c             | 1155 +++++++++++++++++
> >  .../dt-bindings/clock/mediatek,mt8365-clk.h   |  179 ++-
> 
> No, bindings are always separate.

Of course, I screwed up my rebasing here, sorry. Fixed for v4.

Best,
Markus