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Message-ID: <fe9d9673-e133-3230-01b5-df463c315026@arm.com>
Date: Thu, 11 Aug 2022 14:55:30 +0530
From: Anshuman Khandual <anshuman.khandual@....com>
To: Tao Zhang <quic_taozha@...cinc.com>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Suzuki K Poulose <suzuki.poulose@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org
Cc: Mike Leach <mike.leach@...aro.org>, Leo Yan <leo.yan@...aro.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Tingwei Zhang <quic_tingweiz@...cinc.com>,
Mao Jinlong <quic_jinlmao@...cinc.com>,
Yuanfang Zhang <quic_yuanfang@...cinc.com>
Subject: Re: [PATCH v2 2/2] arm64: dts: qcom: sm8250: Add Coresight support
On 9/24/21 15:36, Tao Zhang wrote:
> Add the basic coresight components found on Qualcomm SM8250 Soc. The
> basic coresight components include ETF, ETMs,STM and the related
> funnels.
Hello,
Seems like this patch never merged mainline, what happened ? This change is
required to enable coresight devices on RB5 platform.
- Anshuman
>
> Signed-off-by: Tao Zhang <quic_taozha@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 439 +++++++++++++++++++++++++++++++
> 1 file changed, 439 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
> index 5f41de2..1e1579a 100644
> --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
> +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
> @@ -223,6 +223,445 @@
> regulator-max-microvolt = <1800000>;
> regulator-always-on;
> };
> +
> + stm@...2000 {
> + compatible = "arm,coresight-stm", "arm,primecell";
> + reg = <0 0x06002000 0 0x1000>,
> + <0 0x16280000 0 0x180000>;
> + reg-names = "stm-base", "stm-stimulus-base";
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + stm_out: endpoint {
> + remote-endpoint =
> + <&funnel0_in7>;
> + };
> + };
> + };
> + };
> +
> + funnel@...1000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> + reg = <0 0x06041000 0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + funnel0_out: endpoint {
> + remote-endpoint =
> + <&merge_funnel_in0>;
> + };
> + };
> + };
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@7 {
> + reg = <7>;
> + funnel0_in7: endpoint {
> + remote-endpoint = <&stm_out>;
> + };
> + };
> + };
> + };
> +
> + funnel@...2000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> + reg = <0 0x06042000 0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + funnel2_out: endpoint {
> + remote-endpoint =
> + <&merge_funnel_in2>;
> + };
> + };
> + };
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@4 {
> + reg = <4>;
> + funnel2_in5: endpoint {
> + remote-endpoint =
> + <&apss_merge_funnel_out>;
> + };
> + };
> + };
> + };
> +
> + funnel@...4000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> + arm,primecell-periphid = <0x000bb908>;
> +
> + reg = <0 0x6b04000 0 0x1000>;
> + reg-names = "funnel-base";
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + merge_funnel_out: endpoint {
> + remote-endpoint =
> + <&etf_in>;
> + };
> + };
> + };
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@7 {
> + reg = <7>;
> + swao_funnel_in7: endpoint {
> + slave-mode;
> + remote-endpoint=
> + <&merg_funnel_out>;
> + };
> + };
> + };
> +
> + };
> +
> + funnel@...5000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> + reg = <0 0x06045000 0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + merg_funnel_out: endpoint {
> + remote-endpoint = <&swao_funnel_in7>;
> + };
> + };
> + };
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + merge_funnel_in0: endpoint {
> + remote-endpoint =
> + <&funnel0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + merge_funnel_in2: endpoint {
> + remote-endpoint =
> + <&funnel2_out>;
> + };
> + };
> + };
> + };
> +
> + etf@...5000 {
> + compatible = "arm,coresight-tmc", "arm,primecell";
> + reg = <0 0x06b05000 0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + etf_in: endpoint {
> + remote-endpoint =
> + <&merge_funnel_out>;
> + };
> + };
> + };
> + };
> +
> + etm@...0000 {
> + compatible = "arm,coresight-etm4x", "arm,primecell";
> + reg = <0 0x07040000 0 0x1000>;
> +
> + cpu = <&CPU0>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> + arm,coresight-loses-context-with-cpu;
> +
> + out-ports {
> + port {
> + etm0_out: endpoint {
> + remote-endpoint =
> + <&apss_funnel_in0>;
> + };
> + };
> + };
> + };
> +
> + etm@...0000 {
> + compatible = "arm,coresight-etm4x", "arm,primecell";
> + reg = <0 0x07140000 0 0x1000>;
> +
> + cpu = <&CPU1>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> + arm,coresight-loses-context-with-cpu;
> +
> + out-ports {
> + port {
> + etm1_out: endpoint {
> + remote-endpoint =
> + <&apss_funnel_in1>;
> + };
> + };
> + };
> + };
> +
> + etm@...0000 {
> + compatible = "arm,coresight-etm4x", "arm,primecell";
> + reg = <0 0x07240000 0 0x1000>;
> +
> + cpu = <&CPU2>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> + arm,coresight-loses-context-with-cpu;
> +
> + out-ports {
> + port {
> + etm2_out: endpoint {
> + remote-endpoint =
> + <&apss_funnel_in2>;
> + };
> + };
> + };
> + };
> +
> + etm@...0000 {
> + compatible = "arm,coresight-etm4x", "arm,primecell";
> + reg = <0 0x07340000 0 0x1000>;
> +
> + cpu = <&CPU3>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> + arm,coresight-loses-context-with-cpu;
> +
> + out-ports {
> + port {
> + etm3_out: endpoint {
> + remote-endpoint =
> + <&apss_funnel_in3>;
> + };
> + };
> + };
> + };
> +
> + etm@...0000 {
> + compatible = "arm,coresight-etm4x", "arm,primecell";
> + reg = <0 0x07440000 0 0x1000>;
> +
> + cpu = <&CPU4>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> + arm,coresight-loses-context-with-cpu;
> +
> + out-ports {
> + port {
> + etm4_out: endpoint {
> + remote-endpoint =
> + <&apss_funnel_in4>;
> + };
> + };
> + };
> + };
> +
> + etm@...0000 {
> + compatible = "arm,coresight-etm4x", "arm,primecell";
> + reg = <0 0x07540000 0 0x1000>;
> +
> + cpu = <&CPU5>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> + arm,coresight-loses-context-with-cpu;
> +
> + out-ports {
> + port {
> + etm5_out: endpoint {
> + remote-endpoint =
> + <&apss_funnel_in5>;
> + };
> + };
> + };
> + };
> +
> + etm@...0000 {
> + compatible = "arm,coresight-etm4x", "arm,primecell";
> + reg = <0 0x07640000 0 0x1000>;
> +
> + cpu = <&CPU6>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> + arm,coresight-loses-context-with-cpu;
> +
> + out-ports {
> + port {
> + etm6_out: endpoint {
> + remote-endpoint =
> + <&apss_funnel_in6>;
> + };
> + };
> + };
> + };
> +
> + etm@...0000 {
> + compatible = "arm,coresight-etm4x", "arm,primecell";
> + reg = <0 0x07740000 0 0x1000>;
> +
> + cpu = <&CPU7>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> + arm,coresight-loses-context-with-cpu;
> +
> + out-ports {
> + port {
> + etm7_out: endpoint {
> + remote-endpoint =
> + <&apss_funnel_in7>;
> + };
> + };
> + };
> + };
> +
> + funnel@...0000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> + reg = <0 0x07800000 0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + apss_funnel_out: endpoint {
> + remote-endpoint =
> + <&apss_merge_funnel_in>;
> + };
> + };
> + };
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + apss_funnel_in0: endpoint {
> + remote-endpoint =
> + <&etm0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + apss_funnel_in1: endpoint {
> + remote-endpoint =
> + <&etm1_out>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> + apss_funnel_in2: endpoint {
> + remote-endpoint =
> + <&etm2_out>;
> + };
> + };
> +
> + port@3 {
> + reg = <3>;
> + apss_funnel_in3: endpoint {
> + remote-endpoint =
> + <&etm3_out>;
> + };
> + };
> +
> + port@4 {
> + reg = <4>;
> + apss_funnel_in4: endpoint {
> + remote-endpoint =
> + <&etm4_out>;
> + };
> + };
> +
> + port@5 {
> + reg = <5>;
> + apss_funnel_in5: endpoint {
> + remote-endpoint =
> + <&etm5_out>;
> + };
> + };
> +
> + port@6 {
> + reg = <6>;
> + apss_funnel_in6: endpoint {
> + remote-endpoint =
> + <&etm6_out>;
> + };
> + };
> +
> + port@7 {
> + reg = <7>;
> + apss_funnel_in7: endpoint {
> + remote-endpoint =
> + <&etm7_out>;
> + };
> + };
> + };
> + };
> +
> + funnel@...0000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> + reg = <0 0x07810000 0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + apss_merge_funnel_out: endpoint {
> + remote-endpoint =
> + <&funnel2_in5>;
> + };
> + };
> + };
> +
> + in-ports {
> + port {
> + apss_merge_funnel_in: endpoint {
> + remote-endpoint =
> + <&apss_funnel_out>;
> + };
> + };
> + };
> + };
> };
>
> &adsp {
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