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Message-Id: <20220811154237.1531313-11-sashal@kernel.org>
Date: Thu, 11 Aug 2022 11:41:05 -0400
From: Sasha Levin <sashal@...nel.org>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
Cc: David Zhang <dingchen.zhang@....com>, Leo Li <sunpeng.li@....com>,
Harry Wentland <harry.wentland@....com>,
Alex Deucher <alexander.deucher@....com>,
Sasha Levin <sashal@...nel.org>, Rodrigo.Siqueira@....com,
christian.koenig@....com, Xinhui.Pan@....com, airlied@...ux.ie,
daniel@...ll.ch, nicholas.kazlauskas@....com, Jerry.Zuo@....com,
mikita.lipski@....com, Jimmy.Kizito@....com, dale.zhao@....com,
wenjing.liu@....com, Anthony.Koo@....com, Anson.Jacob@....com,
po-tchen@....com, dharati.shah@....com, rdunlap@...radead.org,
amd-gfx@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org
Subject: [PATCH AUTOSEL 5.18 11/93] drm/amd/display: fix system hang when PSR exits
From: David Zhang <dingchen.zhang@....com>
[ Upstream commit 6cc5c77300afbb285c4f41e04f3435ae3c484c40 ]
[why]
When DC driver send PSR exit dmub command to DMUB FW, it might not
wait until PSR exit. Then it may hit the following deadlock situation.
1. DC driver send HW LOCK command to DMUB FW due to frame update
2. DMUB FW Set the HW lock
3. DMUB execute PSR exit sequence and stuck at polling DPG Pending
register due to the HW Lock is set
4. DC driver ask DMUB FW to unlock HW lock, but DMUB FW is polling
DPG pending register
[how]
The reason why DC driver doesn't wait until PSR exit is because some of
the PSR state machine state is not update the dc driver. So when DC
driver read back the PSR state, it take the state for PSR inactive.
Signed-off-by: David Zhang <dingchen.zhang@....com>
Acked-by: Leo Li <sunpeng.li@....com>
Reviewed-by: Harry Wentland <harry.wentland@....com>
Signed-off-by: Alex Deucher <alexander.deucher@....com>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
drivers/gpu/drm/amd/display/dc/dc_types.h | 7 +++++++
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 16 ++++++++++++++++
2 files changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index 2ba9f528c0fe..f1f11b3c205f 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -657,10 +657,17 @@ enum dc_psr_state {
PSR_STATE4b,
PSR_STATE4c,
PSR_STATE4d,
+ PSR_STATE4_FULL_FRAME,
+ PSR_STATE4a_FULL_FRAME,
+ PSR_STATE4b_FULL_FRAME,
+ PSR_STATE4c_FULL_FRAME,
+ PSR_STATE4_FULL_FRAME_POWERUP,
PSR_STATE5,
PSR_STATE5a,
PSR_STATE5b,
PSR_STATE5c,
+ PSR_STATE_HWLOCK_MGR,
+ PSR_STATE_POLLVUPDATE,
PSR_STATE_INVALID = 0xFF
};
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
index 312c68172689..ce2f70134669 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
@@ -74,6 +74,22 @@ static enum dc_psr_state convert_psr_state(uint32_t raw_state)
state = PSR_STATE5b;
else if (raw_state == 0x53)
state = PSR_STATE5c;
+ else if (raw_state == 0x4A)
+ state = PSR_STATE4_FULL_FRAME;
+ else if (raw_state == 0x4B)
+ state = PSR_STATE4a_FULL_FRAME;
+ else if (raw_state == 0x4C)
+ state = PSR_STATE4b_FULL_FRAME;
+ else if (raw_state == 0x4D)
+ state = PSR_STATE4c_FULL_FRAME;
+ else if (raw_state == 0x4E)
+ state = PSR_STATE4_FULL_FRAME_POWERUP;
+ else if (raw_state == 0x60)
+ state = PSR_STATE_HWLOCK_MGR;
+ else if (raw_state == 0x61)
+ state = PSR_STATE_POLLVUPDATE;
+ else
+ state = PSR_STATE_INVALID;
return state;
}
--
2.35.1
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