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Message-ID: <bac57cb8-6d3f-63b0-f504-eb65956d6422@linaro.org>
Date: Fri, 12 Aug 2022 12:47:46 +0300
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Sam Protsenko <semen.protsenko@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>
Cc: Alim Akhtar <alim.akhtar@...sung.com>,
Chanho Park <chanho61.park@...sung.com>,
David Virag <virag.david003@...il.com>,
Marek Szyprowski <m.szyprowski@...sung.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Sumit Semwal <sumit.semwal@...aro.org>,
Tomasz Figa <tomasz.figa@...il.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-samsung-soc@...r.kernel.org
Subject: Re: [PATCH v2 5/9] clk: samsung: exynos850: Implement CMU_AUD domain
On 09/08/2022 14:33, Sam Protsenko wrote:
> CMU_AUD clock domain provides clocks for ABOX IP-core (audio subsystem).
> According to Exynos850 TRM, CMU_AUD generates Cortex-A32 clock, bus
> clock and audio clocks for BLK_AUD.
>
> This patch adds next clocks:
> - bus clocks in CMU_TOP needed for CMU_AUD
> - all internal CMU_AUD clocks
> - leaf clocks for Cortex-A32, Speedy FM, UAIF0..UAIF6 (Unified Audio
> Interface), CNT (counter), ABOX IP-core, ASB (Asynchronous Bridge),
> DAP (Debug Access Port), I2S Codec MCLK, D_TZPC (TrustZone
> Protection Controller), GPIO, PPMU (Platform Performance Monitoring
> Unit), SysMMU, SysReg and WDT
>
> ABOX clock was marked as CLK_IGNORE_UNUSED, as system hangs on boot
> otherwise. Once ABOX driver is implemented, maybe it can be handled
> there instead.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@...aro.org>
> ---
> Changes in v2:
> - (none)
>
> drivers/clk/samsung/clk-exynos850.c | 302 ++++++++++++++++++++++++++++
> 1 file changed, 302 insertions(+)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Best regards,
Krzysztof
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