linux-kernel - Re: [PATCH] perf: riscv: fix broken build due to struct redefinition

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Message-Id: <2055040C-D443-47FD-B6E2-C4C6B3E600B4@jrtc27.com>
Date:   Fri, 12 Aug 2022 15:13:54 +0100
From:   Jessica Clarke <jrtc27@...c27.com>
To:     Conor Dooley <conor.dooley@...rochip.com>
Cc:     Palmer Dabbelt <palmer@...belt.com>,
        Palmer Dabbelt <palmer@...osinc.com>,
        Atish Patra <atishp@...shpatra.org>,
        Anup Patel <anup@...infault.org>,
        Will Deacon <will@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] perf: riscv: fix broken build due to struct redefinition

On 12 Aug 2022, at 14:51, Conor Dooley <conor.dooley@...rochip.com> wrote:
> 
> Building riscv/for-next produces following error:
> drivers/perf/riscv_pmu_sbi.c:44:7: error: redefinition of 'sbi_pmu_ctr_info'
> union sbi_pmu_ctr_info {
>      ^
> arch/riscv/include/asm/sbi.h:125:7: note: previous definition is here
> union sbi_pmu_ctr_info {
> 
> This appears to have been caused by a merge conflict resolution between
> riscv/for-next & riscv/fixes, causing the struct define not being

union, not struct

Jess

> properly moved to its header.
> 
> Fixes: 9a7ccac63f9c ("perf: riscv_pmu{,_sbi}: Miscallenous improvement & fixes")
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> drivers/perf/riscv_pmu_sbi.c | 14 --------------
> 1 file changed, 14 deletions(-)
> 
> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> index e7c6fecbf061..6f6681bbfd36 100644
> --- a/drivers/perf/riscv_pmu_sbi.c
> +++ b/drivers/perf/riscv_pmu_sbi.c
> @@ -41,20 +41,6 @@ static const struct attribute_group *riscv_pmu_attr_groups[] = {
> 	NULL,
> };
> 
> -union sbi_pmu_ctr_info {
> -	unsigned long value;
> -	struct {
> -		unsigned long csr:12;
> -		unsigned long width:6;
> -#if __riscv_xlen == 32
> -		unsigned long reserved:13;
> -#else
> -		unsigned long reserved:45;
> -#endif
> -		unsigned long type:1;
> -	};
> -};
> -
> /*
>  * RISC-V doesn't have hetergenous harts yet. This need to be part of
>  * per_cpu in case of harts with different pmu counters
> -- 
> 2.36.1
> 
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

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