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Message-ID: <YvZkpYRfrgPLLoJV@zn.tnic>
Date: Fri, 12 Aug 2022 16:33:09 +0200
From: Borislav Petkov <bp@...en8.de>
To: Tom Lendacky <thomas.lendacky@....com>
Cc: linux-kernel@...r.kernel.org, x86@...nel.org,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"Kirill A. Shutemov" <kirill@...temov.name>,
"H. Peter Anvin" <hpa@...or.com>,
Michael Roth <michael.roth@....com>,
Joerg Roedel <jroedel@...e.de>,
Andy Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>
Subject: Re: [PATCH v2 1/2] x86/sev: Put PSC struct on the stack in prep for
unaccepted memory support
On Fri, Aug 12, 2022 at 09:11:25AM -0500, Tom Lendacky wrote:
> There was a whole discussion on this
Pointer to it?
> and I would prefer to keep the ability to parallelize PSC without
> locking.
So smaller, on-stack PSC but lockless is still better than a bigger one
but with synchronized accesses to it?
> Well when we don't know which GHCB is in use, using that reserved area in
> the GHCB doesn't help.
What do you mean?
The one which you read with
data = this_cpu_read(runtime_data);
in snp_register_per_cpu_ghcb() is the one you register.
> Also, I don't want to update the GHCB specification for a single bit
> that is only required because of the way Linux went about establishing
> the GHCB usage.
Linux?
You mean, you did it this way: 885689e47dfa1499b756a07237eb645234d93cf9
:-)
"The runtime handler needs one GHCB per-CPU. Set them up and map them
unencrypted."
Why does that handler need one GHCB per CPU?
As to the field, I was thinking along the lines of
struct ghcb.vendor_flags
field which each virt vendor can use however they like.
It might be overkill but a random bool ain't pretty either. Especially
if those things start getting added for all kinds of other things.
If anything, you could make this a single u64 sev_flags which can at
least collect all that gunk in one variable ... at least...
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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