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Date: Fri, 12 Aug 2022 08:10:43 -0700 (PDT) From: Palmer Dabbelt <palmer@...belt.com> To: krzysztof.kozlowski@...aro.org CC: geert@...ux-m68k.org, biju.das.jz@...renesas.com, prabhakar.csengg@...il.com, prabhakar.mahadev-lad.rj@...renesas.com, magnus.damm@...il.com, robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org, Paul Walmsley <paul.walmsley@...ive.com>, aou@...s.berkeley.edu, anup@...infault.org, linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH 4/6] dt-bindings: riscv: Add DT binding documentation for Renesas RZ/Five SoC and SMARC EVK On Thu, 11 Aug 2022 23:23:10 PDT (-0700), krzysztof.kozlowski@...aro.org wrote: > On 11/08/2022 18:42, Geert Uytterhoeven wrote: >> At the DT validation level, I think the proper solution is to >> merge Documentation/devicetree/bindings/arm/renesas.yaml and >> Documentation/devicetree/bindings/riscv/renesas.yaml into a single >> file under Documentation/devicetree/bindings/soc/renesas/. >> >> What do other people think? > > I am ok with it. Seems reasonable to me too, but I pretty much always err on the side of keeping SOC stuff split out from the RISC-V stuff. Just looking at Documentation/devicetree/bindings/riscv/, it's pretty much all SOC stuff -- should we just move everything but cpus.yaml over?
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