linux-kernel - Re: [PATCH] gpio: Allow user to customise maximum number of GPIOs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <B4A6C65C-1480-4D20-9A0C-D97BEABC838F@zytor.com>
Date:   Fri, 12 Aug 2022 16:21:36 -0700
From:   "H. Peter Anvin" <hpa@...or.com>
To:     Andy Shevchenko <andy.shevchenko@...il.com>
CC:     Christophe Leroy <christophe.leroy@...roup.eu>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        Jonathan Corbet <corbet@....net>,
        Russell King <linux@...linux.org.uk>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
        Arnd Bergmann <arnd@...db.de>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux Documentation List <linux-doc@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
        Linux-Arch <linux-arch@...r.kernel.org>
Subject: Re: [PATCH] gpio: Allow user to customise maximum number of GPIOs

On August 12, 2022 2:58:36 PM PDT, Andy Shevchenko <andy.shevchenko@...il.com> wrote:
>On Thu, Aug 11, 2022 at 11:12 PM H. Peter Anvin <hpa@...or.com> wrote:
>>
>> On August 9, 2022 3:40:38 AM PDT, Christophe Leroy <christophe.leroy@...roup.eu> wrote:
>> >At the time being, the default maximum number of GPIOs is set to 512
>> >and can only get customised via an architecture specific
>> >CONFIG_ARCH_NR_GPIO.
>> >
>> >The maximum number of GPIOs might be dependent on the number of
>> >interface boards and is somewhat independent of architecture.
>> >
>> >Allow the user to select that maximum number outside of any
>> >architecture configuration. To enable that, re-define a
>> >core CONFIG_ARCH_NR_GPIO for architectures which don't already
>> >define one. Guard it with a new hidden CONFIG_ARCH_HAS_NR_GPIO.
>> >
>> >Only two architectures will need CONFIG_ARCH_HAS_NR_GPIO: x86 and arm.
>> >
>> >On arm, do like x86 and set 512 as the default instead of 0, that
>> >allows simplifying the logic in asm-generic/gpio.h
>
>...
>
>> This seems very odd to me. GPIOs can be, and often are, attached to peripheral buses which means that the *same system* can have anything from none to thousands of gpios ..
>
>Basically this setting should give us a *minimum* GPIO lines that are
>present on the system. And that is perfectly SoC dependent. The real
>issue is that the GPIO framework has these global arrays that (still?)
>can't be initialized from the heap due to too early initialization (is
>it the true reason?).
>

Ok that makes more sense... but in that case, it would also be good to reclaim excess storage that turns out to not be needed.

I am a bit skeptical, though – we get basic memory allocation very early.