linux-kernel - Re: [PATCH 07/12] riscv: dts: allwinner: Add Allwinner D1 Nezha devicetree

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Message-ID: <822fae38-bc81-b7e2-23cf-be71f3c6fff4@microchip.com>
Date:   Mon, 15 Aug 2022 18:34:34 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <samuel@...lland.org>, <wens@...e.org>, <jernej.skrabec@...il.com>,
        <linux-sunxi@...ts.linux.dev>, <palmer@...belt.com>,
        <paul.walmsley@...ive.com>, <aou@...s.berkeley.edu>,
        <linux-riscv@...ts.infradead.org>
CC:     <robh+dt@...nel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <krzysztof.kozlowski+dt@...aro.org>
Subject: Re: [PATCH 07/12] riscv: dts: allwinner: Add Allwinner D1 Nezha
 devicetree

On 15/08/2022 18:37, Conor Dooley - M52691 wrote:
> On 15/08/2022 06:08, Samuel Holland wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> "D1 Nezha" is Allwinner's first-party development board for the D1 SoC.
>> It was shipped with 512M, 1G, or 2G of DDR3. It supports onboard audio,
>> HDMI, gigabit Ethernet, WiFi and Bluetooth, USB 2.0 host and OTG ports,
>> plus low-speed I/O from the SoC and a GPIO expander chip.
>>
>> Most other D1 boards copied the Nezha's power tree, with the 1.8V rail
>> powered by the SoCs internal LDOA, analog domains powered by ALDO, and
>> the rest of the board powered by always-on fixed regulators. Some (but
>> not all) boards also copied the PWM CPU regulator. To avoid duplication,
>> factor out the out the regulator references that are common across all
>> known boards.
>>
>> Signed-off-by: Samuel Holland <samuel@...lland.org>
> 
> Hey Samuel,
> Replying here as it's the board I happen to have but I saw some kernel
> panics. Some of this has reproduced for Ron/drmpeg on an unmatched:
> https://www.w6rz.net/segfault.png
> but some of this is different:
> https://gist.github.com/ConchuOD/7d87f574df1ddc56f192e505ecab6574
> 
> defconfig is default riscv defconfig - the DRM modules + my cmdline:
> CONFIG_CMDLINE="earlyprintk=sunxi-uart,0x02500000 earlycon console=ttyS0,115200"

I seem to be making a hames of things today. Started it with the email
to the wrong patchset this morning and now here I am 12h later and I am
messing up my stuff here too :/

I think I confused myself with the configs & logs. This one here was the
default defconfig + CONFIG_CMDLINE [0]:
https://gist.github.com/ConchuOD/7d87f574df1ddc56f192e505ecab6574#file-log-txt-no-drm

This one was from the d1-wip branch that I had been using prior
to the patchset with CONFIG_CMDLINE [0]:
https://gist.github.com/ConchuOD/7d87f574df1ddc56f192e505ecab6574#file-log-txt-with-drm

And with a defconfig from Heiko I get hangs where output dies using
CONFIG_CMDLINE [1]:
https://paste.debian.net/1250519/
https://gist.github.com/ConchuOD/7d87f574df1ddc56f192e505ecab6574#file-heiko-config

For all of the above I have used:
0 - CONFIG_CMDLINE="root=/dev/nfs ip=dhcp nfsroot=192.168.2.5:/stuff/nfs_share earlyprintk=sunxi-uart,0x02500000 earlycon console=ttyS0,115200"
1 - CONFIG_CMDLINE="earlyprintk=sunxi-uart,0x02500000 earlycon console=ttyS0,115200"

If I don't use [1], I don't get any output on the uart my u-boot uses.

Heiko reminded me that the D1 needs the memory nodes from the dts etc,
so it's actually using the u-boot dts. Did you make breaking changes
between what worked with the d1-wip branch and this submission?
I'll update what my u-boot has, but in the meantime hopefully this
makes things a little clearer.

Sorry for all the noise etc, I seem to be all over the shop today.
Conor.

>
> lmk if you want anymore info :)
> Conor.
> 
>> ---
>>
>>  arch/riscv/boot/dts/allwinner/Makefile        |   1 +
>>  .../sun20i-d1-common-regulators.dtsi          |  51 ++++++
>>  .../boot/dts/allwinner/sun20i-d1-nezha.dts    | 171 ++++++++++++++++++
>>  3 files changed, 223 insertions(+)
>>  create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-common-regulators.dtsi
>>  create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts
>>
>> diff --git a/arch/riscv/boot/dts/allwinner/Makefile b/arch/riscv/boot/dts/allwinner/Makefile
>> index f66554cd5c45..b0a15e8c8d82 100644
>> --- a/arch/riscv/boot/dts/allwinner/Makefile
>> +++ b/arch/riscv/boot/dts/allwinner/Makefile
>> @@ -1 +1,2 @@
>>  # SPDX-License-Identifier: GPL-2.0
>> +dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-nezha.dtb
>> diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-common-regulators.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1-common-regulators.dtsi
>> new file mode 100644
>> index 000000000000..143a3e710c3c
>> --- /dev/null
>> +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-common-regulators.dtsi
>> @@ -0,0 +1,51 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
>> +// Copyright (C) 2021-2022 Samuel Holland <samuel@...lland.org>
>> +
>> +/ {
>> +       reg_vcc: vcc {
>> +               compatible = "regulator-fixed";
>> +               regulator-name = "vcc";
>> +               regulator-min-microvolt = <5000000>;
>> +               regulator-max-microvolt = <5000000>;
>> +       };
>> +
>> +       reg_vcc_3v3: vcc-3v3 {
>> +               compatible = "regulator-fixed";
>> +               regulator-name = "vcc-3v3";
>> +               regulator-min-microvolt = <3300000>;
>> +               regulator-max-microvolt = <3300000>;
>> +               vin-supply = <&reg_vcc>;
>> +       };
>> +};
>> +
>> +&lradc {
>> +       vref-supply = <&reg_aldo>;
>> +};
>> +
>> +&pio {
>> +       vcc-pb-supply = <&reg_vcc_3v3>;
>> +       vcc-pc-supply = <&reg_vcc_3v3>;
>> +       vcc-pd-supply = <&reg_vcc_3v3>;
>> +       vcc-pe-supply = <&reg_vcc_3v3>;
>> +       vcc-pf-supply = <&reg_vcc_3v3>;
>> +       vcc-pg-supply = <&reg_vcc_3v3>;
>> +};
>> +
>> +&reg_aldo {
>> +       regulator-min-microvolt = <1800000>;
>> +       regulator-max-microvolt = <1800000>;
>> +       vdd33-supply = <&reg_vcc_3v3>;
>> +};
>> +
>> +&reg_hpldo {
>> +       regulator-min-microvolt = <1800000>;
>> +       regulator-max-microvolt = <1800000>;
>> +       hpldoin-supply = <&reg_vcc_3v3>;
>> +};
>> +
>> +&reg_ldoa {
>> +       regulator-always-on;
>> +       regulator-min-microvolt = <1800000>;
>> +       regulator-max-microvolt = <1800000>;
>> +       ldo-in-supply = <&reg_vcc_3v3>;
>> +};
>> diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts b/arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts
>> new file mode 100644
>> index 000000000000..df865ee15fcf
>> --- /dev/null
>> +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts
>> @@ -0,0 +1,171 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
>> +// Copyright (C) 2021-2022 Samuel Holland <samuel@...lland.org>
>> +
>> +/dts-v1/;
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/input/input.h>
>> +
>> +#include "sun20i-d1.dtsi"
>> +#include "sun20i-d1-common-regulators.dtsi"
>> +
>> +/ {
>> +       model = "Allwinner D1 Nezha";
>> +       compatible = "allwinner,d1-nezha", "allwinner,sun20i-d1";
>> +
>> +       aliases {
>> +               ethernet0 = &emac;
>> +               ethernet1 = &xr829;
>> +               mmc0 = &mmc0;
>> +               serial0 = &uart0;
>> +       };
>> +
>> +       chosen {
>> +               stdout-path = "serial0:115200n8";
>> +       };
>> +
>> +       reg_usbvbus: usbvbus {
>> +               compatible = "regulator-fixed";
>> +               regulator-name = "usbvbus";
>> +               regulator-min-microvolt = <5000000>;
>> +               regulator-max-microvolt = <5000000>;
>> +               gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
>> +               enable-active-high;
>> +               vin-supply = <&reg_vcc>;
>> +       };
>> +
>> +       /*
>> +        * This regulator is PWM-controlled, but the PWM controller is not
>> +        * yet supported, so fix the regulator to its default voltage.
>> +        */
>> +       reg_vdd_cpu: vdd-cpu {
>> +               compatible = "regulator-fixed";
>> +               regulator-name = "vdd-cpu";
>> +               regulator-min-microvolt = <1100000>;
>> +               regulator-max-microvolt = <1100000>;
>> +               vin-supply = <&reg_vcc>;
>> +       };
>> +
>> +       wifi_pwrseq: wifi-pwrseq {
>> +               compatible = "mmc-pwrseq-simple";
>> +               reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
>> +       };
>> +};
>> +
>> +&cpu0 {
>> +       cpu-supply = <&reg_vdd_cpu>;
>> +};
>> +
>> +&ehci0 {
>> +       status = "okay";
>> +};
>> +
>> +&ehci1 {
>> +       status = "okay";
>> +};
>> +
>> +&emac {
>> +       pinctrl-0 = <&rgmii_pe_pins>;
>> +       pinctrl-names = "default";
>> +       phy-handle = <&ext_rgmii_phy>;
>> +       phy-mode = "rgmii-id";
>> +       phy-supply = <&reg_vcc_3v3>;
>> +       status = "okay";
>> +};
>> +
>> +&i2c2 {
>> +       pinctrl-0 = <&i2c2_pb0_pins>;
>> +       pinctrl-names = "default";
>> +       status = "okay";
>> +
>> +       pcf8574a: gpio@38 {
>> +               compatible = "nxp,pcf8574a";
>> +               reg = <0x38>;
>> +               interrupt-parent = <&pio>;
>> +               interrupts = <1 2 IRQ_TYPE_LEVEL_LOW>; /* PB2 */
>> +               interrupt-controller;
>> +               gpio-controller;
>> +               #gpio-cells = <2>;
>> +               #interrupt-cells = <2>;
>> +       };
>> +};
>> +
>> +&lradc {
>> +       status = "okay";
>> +
>> +       button-160 {
>> +               label = "OK";
>> +               linux,code = <KEY_OK>;
>> +               channel = <0>;
>> +               voltage = <160000>;
>> +       };
>> +};
>> +
>> +&mdio {
>> +       ext_rgmii_phy: ethernet-phy@1 {
>> +               compatible = "ethernet-phy-ieee802.3-c22";
>> +               reg = <1>;
>> +       };
>> +};
>> +
>> +&mmc0 {
>> +       bus-width = <4>;
>> +       cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
>> +       disable-wp;
>> +       vmmc-supply = <&reg_vcc_3v3>;
>> +       vqmmc-supply = <&reg_vcc_3v3>;
>> +       pinctrl-0 = <&mmc0_pins>;
>> +       pinctrl-names = "default";
>> +       status = "okay";
>> +};
>> +
>> +&mmc1 {
>> +       bus-width = <4>;
>> +       mmc-pwrseq = <&wifi_pwrseq>;
>> +       non-removable;
>> +       vmmc-supply = <&reg_vcc_3v3>;
>> +       vqmmc-supply = <&reg_vcc_3v3>;
>> +       pinctrl-0 = <&mmc1_pins>;
>> +       pinctrl-names = "default";
>> +       status = "okay";
>> +
>> +       xr829: wifi@1 {
>> +               reg = <1>;
>> +       };
>> +};
>> +
>> +&ohci0 {
>> +       status = "okay";
>> +};
>> +
>> +&ohci1 {
>> +       status = "okay";
>> +};
>> +
>> +&uart0 {
>> +       pinctrl-0 = <&uart0_pb8_pins>;
>> +       pinctrl-names = "default";
>> +       status = "okay";
>> +};
>> +
>> +&uart1 {
>> +       uart-has-rtscts;
>> +       pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
>> +       pinctrl-names = "default";
>> +       status = "okay";
>> +
>> +       /* XR829 bluetooth is connected here */
>> +};
>> +
>> +&usb_otg {
>> +       dr_mode = "otg";
>> +       status = "okay";
>> +};
>> +
>> +&usbphy {
>> +       usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */
>> +       usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
>> +       usb0_vbus-supply = <&reg_usbvbus>;
>> +       usb1_vbus-supply = <&reg_vcc>;
>> +       status = "okay";
>> +};
>> --
>> 2.35.1
>>
>