linux-kernel - [PATCH 02/12] dt-bindings: riscv: Add T-HEAD C906 and C910 compatibles

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Date:   Mon, 15 Aug 2022 00:08:05 -0500
From:   Samuel Holland <samuel@...lland.org>
To:     Chen-Yu Tsai <wens@...e.org>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        linux-sunxi@...ts.linux.dev, Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-riscv@...ts.infradead.org
Cc:     Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Samuel Holland <samuel@...lland.org>
Subject: [PATCH 02/12] dt-bindings: riscv: Add T-HEAD C906 and C910 compatibles

The C906 and C910 are RISC-V CPU cores from T-HEAD Semiconductor.
Notably, the C906 core is used in the Allwinner D1 SoC.

Signed-off-by: Samuel Holland <samuel@...lland.org>
---

 Documentation/devicetree/bindings/riscv/cpus.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index 873dd12f6e89..ce2161d9115a 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -38,6 +38,8 @@ properties:
               - sifive,u5
               - sifive,u7
               - canaan,k210
+              - thead,c906
+              - thead,c910
           - const: riscv
       - items:
           - enum:
-- 
2.35.1