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Message-Id: <20220815180449.932783291@linuxfoundation.org>
Date: Mon, 15 Aug 2022 19:53:35 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Johan Hovold <johan+linaro@...nel.org>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.19 0259/1157] arm64: dts: qcom: sc7280: drop PCIe PHY clock index
From: Johan Hovold <johan+linaro@...nel.org>
[ Upstream commit 531c738fb36069d60aff267a0b25533a35d59fd0 ]
The QMP PCIe PHY provides a single clock so drop the redundant clock
index.
Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
Fixes: bd7d507935ca ("arm64: dts: qcom: sc7280: Add pcie clock support")
Fixes: 92e0ee9f83b3 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-2-johan+linaro@kernel.org
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index d22405658f13..116b3e0abe93 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -818,7 +818,7 @@ gcc: clock-controller@...000 {
reg = <0 0x00100000 0 0x1f0000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
- <0>, <&pcie1_lane 0>,
+ <0>, <&pcie1_lane>,
<0>, <0>, <0>, <0>;
clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
"pcie_0_pipe_clk", "pcie_1_pipe_clk",
@@ -2110,7 +2110,7 @@ pcie1_lane: phy@...e200 {
clock-names = "pipe0";
#phy-cells = <0>;
- #clock-cells = <1>;
+ #clock-cells = <0>;
clock-output-names = "pcie_1_pipe_clk";
};
};
--
2.35.1
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