lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <a70e34b9-7106-ad2a-16e1-5f115e34ff1e@microchip.com>
Date:   Mon, 15 Aug 2022 16:56:23 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <samuel@...lland.org>, <wens@...e.org>, <jernej.skrabec@...il.com>,
        <linux-sunxi@...ts.linux.dev>, <palmer@...belt.com>,
        <paul.walmsley@...ive.com>, <aou@...s.berkeley.edu>,
        <linux-riscv@...ts.infradead.org>
CC:     <robh+dt@...nel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <krzysztof.kozlowski+dt@...aro.org>
Subject: Re: [PATCH 05/12] riscv: Add the Allwinner SoC family Kconfig option

On 15/08/2022 06:08, Samuel Holland wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Allwinner manufactures the sunxi family of application processors. This
> includes the "sun8i" series of ARMv7 SoCs, the "sun50i" series of ARMv8
> SoCs, and now the "sun20i" series of 64-bit RISC-V SoCs.
> 
> The first SoC in the sun20i series is D1, containing a single T-HEAD
> C906 core. D1s is a low-pin-count variant of D1 with co-packaged DRAM.
> 
> Most peripherals are shared across the entire chip family. In fact, the
> ARMv7 T113 SoC is pin-compatible and almost entirely register-compatible
> with the D1s.
> 
> This means many existing device drivers can be reused. To facilitate
> this reuse, name the symbol ARCH_SUNXI, since that is what the existing
> drivers have as their dependency.

Hey Samuel,
I think this and patch 12/12 with the defconfig changes should be
deferred until post LPC (which still leaves plenty of time for
making the 6.1 merge window). We already have like 4 different
approaches between the existing SOC_FOO symbols & two more when
D1 stuff and the Renesas stuff is considered.

Plan is to decide at LPC on one approach for what to do with
Kconfig.socs & to me it seems like a good idea to do what's being
done here - it's likely that further arm vendors will move and
keeping the common symbols makes a lot of sense to me...

Thanks,
Conor.

> 
> Signed-off-by: Samuel Holland <samuel@...lland.org>
> ---
> 
>  arch/riscv/Kconfig.socs | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 69774bb362d6..1caacbfac1a5 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -1,5 +1,14 @@
>  menu "SoC selection"
> 
> +config ARCH_SUNXI
> +       bool "Allwinner sun20i SoCs"
> +       select ERRATA_THEAD if MMU && !XIP_KERNEL
> +       select SIFIVE_PLIC
> +       select SUN4I_TIMER
> +       help
> +         This enables support for Allwinner sun20i platform hardware,
> +         including boards based on the D1 and D1s SoCs.
> +
>  config SOC_MICROCHIP_POLARFIRE
>         bool "Microchip PolarFire SoCs"
>         select MCHP_CLK_MPFS
> --
> 2.35.1
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ