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Message-ID: <149eee7b-a9e9-94ad-1ab2-13812b541a8c@linaro.org>
Date: Tue, 16 Aug 2022 10:41:45 +0300
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Samuel Holland <samuel@...lland.org>, Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
linux-sunxi@...ts.linux.dev, Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
linux-riscv@...ts.infradead.org
Cc: Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Subject: Re: [PATCH 06/12] riscv: dts: allwinner: Add the D1 SoC base
devicetree
On 15/08/2022 08:08, Samuel Holland wrote:
> +
> + de: display-engine {
> + compatible = "allwinner,sun20i-d1-display-engine";
> + allwinner,pipelines = <&mixer0>, <&mixer1>;
> + status = "disabled";
> + };
> +
> + osc24M: osc24M-clk {
lowercase
> + compatible = "fixed-clock";
> + clock-frequency = <24000000>;
This is a property of the board, not SoC.
> + clock-output-names = "osc24M";
> + #clock-cells = <0>;
> + };
> +
Best regards,
Krzysztof
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