linux-kernel - Re: [PATCH 02/12] dt-bindings: riscv: Add T-HEAD C906 and C910 compatibles

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Message-ID: <20220816173400.GA2424313-robh@kernel.org>
Date:   Tue, 16 Aug 2022 11:34:00 -0600
From:   Rob Herring <robh@...nel.org>
To:     Samuel Holland <samuel@...lland.org>
Cc:     linux-kernel@...r.kernel.org, Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
        linux-sunxi@...ts.linux.dev, Chen-Yu Tsai <wens@...e.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Jernej Skrabec <jernej.skrabec@...il.com>
Subject: Re: [PATCH 02/12] dt-bindings: riscv: Add T-HEAD C906 and C910
 compatibles

On Mon, 15 Aug 2022 00:08:05 -0500, Samuel Holland wrote:
> The C906 and C910 are RISC-V CPU cores from T-HEAD Semiconductor.
> Notably, the C906 core is used in the Allwinner D1 SoC.
> 
> Signed-off-by: Samuel Holland <samuel@...lland.org>
> ---
> 
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 

Acked-by: Rob Herring <robh@...nel.org>