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Message-Id: <20220815180506.566976854@linuxfoundation.org>
Date: Mon, 15 Aug 2022 20:00:28 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org,
Jonathan Cameron <Jonathan.Cameron@...wei.com>,
Lars-Peter Clausen <lars@...afoo.de>,
Nuno Sá <nuno.sa@...log.com>,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.19 0672/1157] iio: dac: ad5064: Fix alignment for DMA safety
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
[ Upstream commit 8779b88c214fa0f8fdfb9c54a124f468884d356a ]
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes: 6a17a0768f77 ("iio:dac:ad5064: Add support for the ad5629r and ad5669r")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
Cc: Lars-Peter Clausen <lars@...afoo.de>
Acked-by: Nuno Sá <nuno.sa@...log.com>
Link: https://lore.kernel.org/r/20220508175712.647246-44-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
drivers/iio/dac/ad5064.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iio/dac/ad5064.c b/drivers/iio/dac/ad5064.c
index d87cf14daabe..4447b8811827 100644
--- a/drivers/iio/dac/ad5064.c
+++ b/drivers/iio/dac/ad5064.c
@@ -115,13 +115,13 @@ struct ad5064_state {
struct mutex lock;
/*
- * DMA (thus cache coherency maintenance) requires the
+ * DMA (thus cache coherency maintenance) may require the
* transfer buffers to live in their own cache lines.
*/
union {
u8 i2c[3];
__be32 spi;
- } data ____cacheline_aligned;
+ } data __aligned(IIO_DMA_MINALIGN);
};
enum ad5064_type {
--
2.35.1
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