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Message-ID: <f646670f8ebc64cf1a3080330d54d733@walle.cc>
Date: Thu, 18 Aug 2022 16:44:28 +0200
From: Michael Walle <michael@...le.cc>
To: Vladimir Oltean <vladimir.oltean@....com>
Cc: devicetree@...r.kernel.org, netdev@...r.kernel.org,
Shawn Guo <shawnguo@...nel.org>, Li Yang <leoyang.li@....com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH devicetree 2/3] arm64: dts: ls1028a: mark enetc port 3 as
a DSA master too
Am 2022-08-18 16:05, schrieb Vladimir Oltean:
> The LS1028A switch has 2 internal links to the ENETC controller.
>
> With DSA's ability to support multiple CPU ports, we should mark both
> ENETC ports as DSA masters.
>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index 3da105119d82..455778936899 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -1170,6 +1170,7 @@ mscc_felix_port5: port@5 {
> reg = <5>;
> phy-mode = "internal";
> status = "disabled";
> + ethernet = <&enetc_port3>;
status should be the last property, no?
-michael
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