linux-kernel - [PATCH 0/4] Add initial support for J784s4 SoC

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Message-ID: <20220819190054.31348-1-a-nandan@ti.com>
Date:   Sat, 20 Aug 2022 00:30:50 +0530
From:   Apurva Nandan <a-nandan@...com>
To:     Nishanth Menon <nm@...com>, Vignesh Raghavendra <vigneshr@...com>,
        Tero Kristo <kristo@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-gpio@...r.kernel.org>
CC:     Apurva Nandan <a-nandan@...com>, Hari Nagalla <hnagalla@...com>
Subject: [PATCH 0/4] Add initial support for J784s4 SoC

The J784S4 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration in automotive ADAS applications
and industrial applications requiring AI at the network edge. This SoC
extends the Jacinto 7 family of SoCs with focus on high performance
providing significant levels of processing power, graphics capability,
video and imaging processing, virtualization and coherent memory
support.

Some highlights of this SoC are:

* Eight Cortex-A72s in dual clusters, four clusters of lockstep capable
  dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA),
  four C7x floating point Vector DSP.
* 3D GPU: Automotive grade IMG BXS-4-64
* Two Vision Processing Accelerator (VPAC) with image signal processor
  and Depth and Motion Processing Accelerator (DMPAC)
* Three CSI2.0 4L RX plus one eDP/DP, two DSI Tx and one DPI interface.
* Two RGMII/RMII interfaces,
* Integrated ethernet switch supporting up to 8 external ports,
* Two 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role device subsystems,
* Up to 20 MCANs, 5 McASP, eMMC and SD, OSPI/HyperBus memory controller,
  QSPI, I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
* Hardware accelerator blocks containing AES/DES/SHA/MD5 called SA2UL
  management.

See J784S4 Technical Reference Manual (SPRUJ52 - JUNE 2022)
for further details: http://www.ti.com/lit/zip/spruj52

Apurva Nandan (4):
  dt-bindings: arm: ti: Add bindings for J784s4 SoC
  dt-bindings: pinctrl: k3: Introduce pinmux definitions for J784s4
  arm64: dts: ti: Add initial support for J784s4 SoC
  arch: arm64: ti: Add support for J784s4 EVM board

 .../devicetree/bindings/arm/ti/k3.yaml        |   6 +
 arch/arm64/boot/dts/ti/Makefile               |   2 +
 arch/arm64/boot/dts/ti/k3-j784s4-evm.dts      | 602 +++++++++++
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi    | 939 ++++++++++++++++++
 .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi     | 301 ++++++
 arch/arm64/boot/dts/ti/k3-j784s4.dtsi         | 287 ++++++
 include/dt-bindings/pinctrl/k3.h              |   3 +
 7 files changed, 2140 insertions(+)
 create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
 create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
 create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
 create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4.dtsi

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