linux-kernel - [PATCH RESEND 2/2] arm64: tegra: Add GPCDMA support for Tegra234 I2C

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Message-ID: <20220819122313.40445-3-akhilrajeev@nvidia.com>
Date:   Fri, 19 Aug 2022 17:53:13 +0530
From:   Akhil R <akhilrajeev@...dia.com>
To:     <robh+dt@...nel.org>, <devicetree@...r.kernel.org>,
        <christian.koenig@....com>, <digetx@...il.com>,
        <=jonathanh@...dia.com>, <ldewangan@...dia.com>,
        <linux-i2c@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-tegra@...r.kernel.org>, <sumit.semwal@...aro.org>,
        <thierry.reding@...il.com>, <wsa@...nel.org>
CC:     <akhilrajeev@...dia.com>
Subject: [PATCH RESEND 2/2] arm64: tegra: Add GPCDMA support for Tegra234 I2C

Add dma properties to support GPCDMA in Tegra234 I2C

Signed-off-by: Akhil R <akhilrajeev@...dia.com>
---
 arch/arm64/boot/dts/nvidia/tegra234.dtsi | 32 ++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 81a0f599685f..34026ca80b36 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -737,6 +737,10 @@
 			clock-names = "div-clk", "parent";
 			resets = <&bpmp TEGRA234_RESET_I2C1>;
 			reset-names = "i2c";
+			dmas = <&gpcdma 21>, <&gpcdma 21>;
+			dma-names = "rx", "tx";
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
 		};
 
 		cam_i2c: i2c@...0000 {
@@ -752,6 +756,10 @@
 			clock-names = "div-clk", "parent";
 			resets = <&bpmp TEGRA234_RESET_I2C3>;
 			reset-names = "i2c";
+			dmas = <&gpcdma 23>, <&gpcdma 23>;
+			dma-names = "rx", "tx";
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
 		};
 
 		dp_aux_ch1_i2c: i2c@...0000 {
@@ -767,6 +775,10 @@
 			clock-names = "div-clk", "parent";
 			resets = <&bpmp TEGRA234_RESET_I2C4>;
 			reset-names = "i2c";
+			dmas = <&gpcdma 26>, <&gpcdma 26>;
+			dma-names = "rx", "tx";
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
 		};
 
 		dp_aux_ch0_i2c: i2c@...0000 {
@@ -782,6 +794,10 @@
 			clock-names = "div-clk", "parent";
 			resets = <&bpmp TEGRA234_RESET_I2C6>;
 			reset-names = "i2c";
+			dmas = <&gpcdma 30>, <&gpcdma 30>;
+			dma-names = "rx", "tx";
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
 		};
 
 		dp_aux_ch2_i2c: i2c@...0000 {
@@ -797,6 +813,10 @@
 			clock-names = "div-clk", "parent";
 			resets = <&bpmp TEGRA234_RESET_I2C7>;
 			reset-names = "i2c";
+			dmas = <&gpcdma 27>, <&gpcdma 27>;
+			dma-names = "rx", "tx";
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
 		};
 
 		dp_aux_ch3_i2c: i2c@...0000 {
@@ -812,6 +832,10 @@
 			clock-names = "div-clk", "parent";
 			resets = <&bpmp TEGRA234_RESET_I2C9>;
 			reset-names = "i2c";
+			dmas = <&gpcdma 31>, <&gpcdma 31>;
+			dma-names = "rx", "tx";
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
 		};
 
 		spi@...0000 {
@@ -1109,6 +1133,10 @@
 			assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
 			resets = <&bpmp TEGRA234_RESET_I2C2>;
 			reset-names = "i2c";
+			dmas = <&gpcdma 22>, <&gpcdma 22>;
+			dma-names = "rx", "tx";
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
 		};
 
 		gen8_i2c: i2c@...0000 {
@@ -1125,6 +1153,10 @@
 			assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
 			resets = <&bpmp TEGRA234_RESET_I2C8>;
 			reset-names = "i2c";
+			dmas = <&gpcdma 0>, <&gpcdma 0>;
+			dma-names = "rx", "tx";
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
 		};
 
 		rtc@...0000 {
-- 
2.17.1