linux-kernel - [PATCH 0/2] Use the correct page tables for SVA under PTI

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Message-Id: <20220822201213.352289-1-jacob.jun.pan@linux.intel.com>
Date:   Mon, 22 Aug 2022 13:12:11 -0700
From:   Jacob Pan <jacob.jun.pan@...ux.intel.com>
To:     LKML <linux-kernel@...r.kernel.org>, iommu@...ts.linux.dev,
        x86@...nel.org, Joerg Roedel <joro@...tes.org>,
        "Lu Baolu" <baolu.lu@...ux.intel.com>
Cc:     Raj Ashok <ashok.raj@...el.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Dave Hansen <dave.hansen@...el.com>,
        "Borislav Petkov" <bp@...en8.de>, "Ingo Molnar" <mingo@...hat.com>,
        "Tian, Kevin" <kevin.tian@...el.com>, Yi Liu <yi.l.liu@...el.com>,
        Jacob Pan <jacob.jun.pan@...ux.intel.com>
Subject: [PATCH 0/2] Use the correct page tables for SVA under PTI

Shared virtual addressing allows DMA to user virtual address, But the
x86 IOMMU drivers are using the kernel copy of the process page tables
when PTI is enabled. This patchset tightens the security intended by
PTI by performing SVA binding with the appropriate process PGDs.

I have tested on Intel platform only, would appreciate itif someone
could help with testing SVA-KPTI on an AMD system.

Jacob Pan (2):
  x86: mm: Allow PTI helpers to be used outside x86/mm
  iommu: Use the user PGD for SVA if PTI is enabled

 arch/x86/include/asm/pgtable.h | 5 +++++
 drivers/iommu/amd/iommu_v2.c   | 4 +++-
 drivers/iommu/intel/svm.c      | 5 ++++-
 3 files changed, 12 insertions(+), 2 deletions(-)

-- 
2.25.1