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Message-ID: <20220822214243.GA905400-robh@kernel.org>
Date: Mon, 22 Aug 2022 16:42:43 -0500
From: Rob Herring <robh@...nel.org>
To: Siddharth Vadapalli <s-vadapalli@...com>
Cc: robh+dt@...nel.org, nsekhar@...com,
krzysztof.kozlowski+dt@...aro.org, pabeni@...hat.com,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
davem@...emloft.net, kishon@...com, vladimir.oltean@....com,
devicetree@...r.kernel.org, grygorii.strashko@...com,
vigneshr@...com, kuba@...nel.org, edumazet@...gle.com,
krzysztof.kozlowski@...aro.org, linux@...linux.org.uk
Subject: Re: [PATCH v5 1/3] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update
bindings for J7200 CPSW5G
On Mon, 22 Aug 2022 12:31:23 +0530, Siddharth Vadapalli wrote:
> Update bindings for TI K3 J7200 SoC which contains 5 ports (4 external
> ports) CPSW5G module and add compatible for it.
>
> Changes made:
> - Add new compatible ti,j7200-cpswxg-nuss for CPSW5G.
> - Extend pattern properties for new compatible.
> - Change maximum number of CPSW ports to 4 for new compatible.
>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@...com>
> ---
> .../bindings/net/ti,k3-am654-cpsw-nuss.yaml | 18 ++++++++++++++++--
> 1 file changed, 16 insertions(+), 2 deletions(-)
>
Reviewed-by: Rob Herring <robh@...nel.org>
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