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Date: Mon, 22 Aug 2022 16:57:24 -0500
From: Rob Herring <robh@...nel.org>
To: Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc: Rob Herring <robh+dt@...nel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
linux-pci@...r.kernel.org, Frank Li <Frank.Li@....com>,
Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
devicetree@...r.kernel.org,
Krzysztof Wilczyński <kw@...ux.com>,
Serge Semin <fancer.lancer@...il.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Jingoo Han <jingoohan1@...il.com>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>
Subject: Re: [PATCH v5 05/20] dt-bindings: PCI: dwc: Add phys/phy-names common properties
On Mon, 22 Aug 2022 21:46:46 +0300, Serge Semin wrote:
> It's normal to have the DW PCIe RP/EP DT-nodes equipped with the explicit
> PHY phandle references. There can be up to 16 PHYs attach in accordance
> with the maximum number of supported PCIe lanes. Let's extend the common
> DW PCIe controller schema with the 'phys' and 'phy-names' properties
> definition. The PHY names are defined with the regexp pattern
> '^pcie([0-9]+|-?phy[0-9]*)?$' so to match the names currently supported by
> the DW PCIe platform drivers ("pcie": meson; "pciephy": qcom, imx6;
> "pcie-phy": uniphier, rockchip, spear13xx; "pcie": intel-gw; "pcie-phy%d":
> keystone, dra7xx; "pcie": histb, etc). Though the "pcie%d" format would
> the most preferable in this case.
>
> Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
>
> ---
>
> Changelog v3:
> - This is a new patch unpinned from the next one:
> https://lore.kernel.org/linux-pci/20220503214638.1895-2-Sergey.Semin@baikalelectronics.ru/
> by the Rob' request. (@Rob)
>
> Changelog v5:
> - Add a note about having line-based PHY phandles order. (@Rob)
> - Prefer 'pcie[0-9]+' PHY-names over the rest of the cases. (@Rob)
> ---
> .../bindings/pci/snps,dw-pcie-common.yaml | 19 +++++++++++++++++++
> .../bindings/pci/snps,dw-pcie-ep.yaml | 3 +++
> .../devicetree/bindings/pci/snps,dw-pcie.yaml | 3 +++
> 3 files changed, 25 insertions(+)
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.example.dtb: pcie@...80000: phy-names: 'oneOf' conditional failed, one must be fixed:
'p2u-0' does not match '^pcie[0-9]+$'
'p2u-0' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-1' does not match '^pcie[0-9]+$'
'p2u-1' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-2' does not match '^pcie[0-9]+$'
'p2u-2' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-3' does not match '^pcie[0-9]+$'
'p2u-3' does not match '^pcie(-?phy[0-9]*)?$'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.example.dtb: pcie@...80000: Unevaluated properties are not allowed ('#address-cells', '#interrupt-cells', '#size-cells', 'bus-range', 'device_type', 'interrupt-map', 'interrupt-map-mask', 'linux,pci-domain', 'num-lanes', 'ranges', 'supports-clkreq' were unexpected)
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.example.dtb: pcie@...60000: phy-names: 'oneOf' conditional failed, one must be fixed:
'p2u-0' does not match '^pcie[0-9]+$'
'p2u-0' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-1' does not match '^pcie[0-9]+$'
'p2u-1' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-2' does not match '^pcie[0-9]+$'
'p2u-2' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-3' does not match '^pcie[0-9]+$'
'p2u-3' does not match '^pcie(-?phy[0-9]*)?$'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.example.dtb: pcie@...60000: Unevaluated properties are not allowed ('#address-cells', '#interrupt-cells', '#size-cells', 'bus-range', 'device_type', 'interrupt-map', 'interrupt-map-mask', 'linux,pci-domain', 'num-lanes', 'num-viewport', 'ranges' were unexpected)
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.example.dtb: pcie-ep@...a0000: phy-names: 'oneOf' conditional failed, one must be fixed:
'p2u-0' does not match '^pcie[0-9]+$'
'p2u-0' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-1' does not match '^pcie[0-9]+$'
'p2u-1' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-2' does not match '^pcie[0-9]+$'
'p2u-2' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-3' does not match '^pcie[0-9]+$'
'p2u-3' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-4' does not match '^pcie[0-9]+$'
'p2u-4' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-5' does not match '^pcie[0-9]+$'
'p2u-5' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-6' does not match '^pcie[0-9]+$'
'p2u-6' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-7' does not match '^pcie[0-9]+$'
'p2u-7' does not match '^pcie(-?phy[0-9]*)?$'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.example.dtb: pcie-ep@...a0000: Unevaluated properties are not allowed ('num-lanes' was unexpected)
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.example.dtb: pcie-ep@...a0000: phy-names: 'oneOf' conditional failed, one must be fixed:
'p2u-0' does not match '^pcie[0-9]+$'
'p2u-0' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-1' does not match '^pcie[0-9]+$'
'p2u-1' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-2' does not match '^pcie[0-9]+$'
'p2u-2' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-3' does not match '^pcie[0-9]+$'
'p2u-3' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-4' does not match '^pcie[0-9]+$'
'p2u-4' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-5' does not match '^pcie[0-9]+$'
'p2u-5' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-6' does not match '^pcie[0-9]+$'
'p2u-6' does not match '^pcie(-?phy[0-9]*)?$'
'p2u-7' does not match '^pcie[0-9]+$'
'p2u-7' does not match '^pcie(-?phy[0-9]*)?$'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.example.dtb: pcie-ep@...a0000: Unevaluated properties are not allowed ('num-lanes' was unexpected)
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
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