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Message-ID: <CAMuHMdVEjKnkj8JKpHUajU=xnDyuWeHmtrz0Y7qML+_XuCxDRg@mail.gmail.com>
Date: Mon, 22 Aug 2022 13:40:12 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Jernej Škrabec <jernej.skrabec@...il.com>
Cc: Samuel Holland <samuel@...lland.org>, Chen-Yu Tsai <wens@...e.org>,
linux-sunxi@...ts.linux.dev, Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
linux-riscv <linux-riscv@...ts.infradead.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Heiko Stübner <heiko@...ech.de>,
Rob Herring <robh+dt@...nel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Subject: Re: [PATCH 06/12] riscv: dts: allwinner: Add the D1 SoC base devicetree
Hi Jernej,
On Tue, Aug 16, 2022 at 11:28 AM Jernej Škrabec
<jernej.skrabec@...il.com> wrote:
> Dne torek, 16. avgust 2022 ob 11:12:05 CEST je Heiko Stübner napisal(a):
> > Am Dienstag, 16. August 2022, 09:49:58 CEST schrieb Jernej Škrabec:
> > > Dne torek, 16. avgust 2022 ob 09:41:45 CEST je Krzysztof Kozlowski
> napisal(a):
> > > > On 15/08/2022 08:08, Samuel Holland wrote:
> > > > > +
> > > > > + de: display-engine {
> > > > > + compatible = "allwinner,sun20i-d1-display-engine";
> > > > > + allwinner,pipelines = <&mixer0>, <&mixer1>;
> > > > > + status = "disabled";
> > > > > + };
> > > > > +
> > > > > + osc24M: osc24M-clk {
> > > >
> > > > lowercase
> > > >
> > > > > + compatible = "fixed-clock";
> > > > > + clock-frequency = <24000000>;
> > > >
> > > > This is a property of the board, not SoC.
> > >
> > > SoC needs 24 MHz oscillator for correct operation, so each and every board
> > > has it. Having it here simplifies board DT files.
> >
> > I guess the oscillator is a separate component on each board, right?
>
> Correct.
>
> > And DT obvious is meant to describe the hardware - independently from
> > implementation-specific choices.
>
> There is no choice in this case. 24 MHz crystal has to be present.
>
> FWIW, including crystal node in SoC specific DTSI is already common pattern in
> Allwinner ARM SoC DTSI files.
I could also be a programmable clock generator on the board, programmed
to generate a 24 MHz clock on one of its outputs? Again, on the board.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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