linux-kernel - Re: [PATCH v2 1/2] dt-bindings: edac: Add bindings for Xilinx ZynqMP OCM

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Message-ID: <52fa28d6-4d48-bd0c-40e6-4f8855c4eac8@linaro.org>
Date:   Tue, 23 Aug 2022 15:46:31 +0300
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Sai Krishna Potthuri <sai.krishna.potthuri@....com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Michal Simek <michal.simek@...inx.com>,
        Borislav Petkov <bp@...en8.de>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Tony Luck <tony.luck@...el.com>,
        James Morse <james.morse@....com>,
        Robert Richter <rric@...nel.org>
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-edac@...r.kernel.org,
        saikrishna12468@...il.com, git@....com,
        Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>
Subject: Re: [PATCH v2 1/2] dt-bindings: edac: Add bindings for Xilinx ZynqMP
 OCM

On 22/08/2022 14:58, Sai Krishna Potthuri wrote:
> From: Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>
> 
> Add bindings for Xilinx ZynqMP OCM controller.
> 
> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>
> Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@....com>
> ---
>  .../bindings/edac/xlnx,zynqmp-ocmc.yaml       | 45 +++++++++++++++++++
>  1 file changed, 45 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> new file mode 100644
> index 000000000000..6389fcb7ed69
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> @@ -0,0 +1,45 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/edac/xlnx,zynqmp-ocmc.yaml#

Filename should be based on compatible, so xlnx,zynqmp-ocmc-1.0.yaml

> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx Zynqmp OCM(On-Chip Memory) Controller

So this is a memory controller, then please put the bindings in the
memory-controllers directory.

> +
> +maintainers:
> +  - Shubhrajyoti Datta <shubhrajyoti.datta@....com>
> +  - Sai Krishna Potthuri <sai.krishna.potthuri@....com>
> +
> +description: |
> +  The OCM supports 64-bit wide ECC functionality to detect multi-bit errors
> +  and recover from a single-bit memory fault.On a write, if all bytes are
> +  being written, the ECC is generated and written into the ECC RAM along with
> +  the write-data that is written into the data RAM. If one or more bytes are
> +  not written, then the read operation results in an correctable error or
> +  uncorrectable error.
> +
> +properties:
> +  compatible:
> +    const: xlnx,zynqmp-ocmc-1.0
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +
> +unevaluatedProperties: false

Instead this should be:
additionalProperties: false

> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    memory-controller@...60000 {
> +      compatible = "xlnx,zynqmp-ocmc-1.0";
> +      reg = <0xff960000 0x1000>;
> +      interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;

What does 0 stand for? I commented about it already.


> +    };


Best regards,
Krzysztof